//TODO LDTRH 0xe8(R13), R23                // b7894e78
	//TODO LDTRSB -0x24(R20), R5               // 85cadd38
	//TODO LDTRSB -0x75(R9), R13               // 2db99838
	//TODO LDTRSH 0xef(R3), LR                 // 7ef8ce78
	//TODO LDTRSH 0x96(R19), R24               // 786a8978
	//TODO LDTRSW 0x1e(LR), R5                 // c5eb81b8
	//TODO LDUR 0xbf(R13), R1                  // a1f14bb8

	{0xffe00c00, 0x38800800, LDTRSB, instArgs{arg_Xt, arg_Xns_mem_optional_imm9_1_signed}, nil},
	// LDTRSH <Wt>, [<Xn|SP>{, #<simm>}]
	{0xffe00c00, 0x78c00800, LDTRSH, instArgs{arg_Wt, arg_Xns_mem_optional_imm9_1_signed}, nil},
	// LDTRSH <Xt>, [<Xn|SP>{, #<simm>}]
	{0xffe00c00, 0x78800800, LDTRSH, instArgs{arg_Xt, arg_Xns_mem_optional_imm9_1_signed}, nil},
	// LDTRSW <Xt>, [<Xn|SP>{, #<simm>}]

{"Name":"LDTRSH","Bits":"0|1|1|1|1|0|0|0|11:2|0|imm9:9|1|0|Rn:5|Rt:5","Arch":"32-bit variant","Syntax":"LDTRSH <Wt>, [<Xn|SP>{, #<simm>}]","Code":"","Alias":""},
{"Name":"LDTRSH","Bits":"0|1|1|1|1|0|0|0|10:2|0|imm9:9|1|0|Rn:5|Rt:5","Arch":"64-bit variant","Syntax":"LDTRSH <Xt>, [<Xn|SP>{, #<simm>}]","Code":"","Alias":""},