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Results 1 - 5 of 5 for LDTRH (0.04 sec)
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src/cmd/internal/obj/arm64/doc.go
Special Cases. (1) umov is written as VMOV. (2) br is renamed JMP, blr is renamed CALL. (3) No need to add "W" suffix: LDARB, LDARH, LDAXRB, LDAXRH, LDTRH, LDXRB, LDXRH. (4) In Go assembly syntax, NOP is a zero-width pseudo-instruction serves generic purpose, nothing related to real ARM64 instruction. NOOP serves for the hardware nop instruction. NOOP is an alias of HINT $0.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Aug 07 00:21:42 UTC 2023 - 9.6K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/plan9x.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 16 22:24:28 UTC 2022 - 17K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/tables.go
LDPSW: "LDPSW", LDR: "LDR", LDRB: "LDRB", LDRH: "LDRH", LDRSB: "LDRSB", LDRSH: "LDRSH", LDRSW: "LDRSW", LDTR: "LDTR", LDTRB: "LDTRB", LDTRH: "LDTRH", LDTRSB: "LDTRSB", LDTRSH: "LDTRSH", LDTRSW: "LDTRSW", LDUR: "LDUR", LDURB: "LDURB", LDURH: "LDURH", LDURSB: "LDURSB", LDURSH: "LDURSH", LDURSW: "LDURSW",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Aug 16 17:57:48 UTC 2017 - 211.8K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64enc.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jul 24 01:11:41 UTC 2023 - 43.9K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/inst.json
{"Name":"LDTRB","Bits":"0|0|1|1|1|0|0|0|0|1|0|imm9:9|1|0|Rn:5|Rt:5","Arch":"Unscaled offset variant","Syntax":"LDTRB <Wt>, [<Xn|SP>{, #<simm>}]","Code":"","Alias":""}, {"Name":"LDTRH","Bits":"0|1|1|1|1|0|0|0|0|1|0|imm9:9|1|0|Rn:5|Rt:5","Arch":"Unscaled offset variant","Syntax":"LDTRH <Wt>, [<Xn|SP>{, #<simm>}]","Code":"","Alias":""},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Aug 16 17:57:48 UTC 2017 - 234.7K bytes - Viewed (0)