for _, a := range inst.Args {
		if a == nil {
			break
		}
		args = append(args, plan9Arg(&inst, pc, symname, a))
	}

	op := inst.Op.String()

	switch inst.Op {
	case LDR, LDRB, LDRH, LDRSB, LDRSH, LDRSW:
		// Check for PC-relative load.
		if offset, ok := inst.Args[1].(PCRel); ok {
			addr := pc + uint64(offset)
			if _, ok := inst.Args[0].(Reg); !ok {
				break
			}

	// LDRSW <Xt>, [<Xn|SP>], #<simm>
	{0xffe00c00, 0xb8800400, LDRSW, instArgs{arg_Xt, arg_Xns_mem_post_imm9_1_signed}, nil},
	// LDRSW <Xt>, [<Xn|SP>{, #<simm>}]!
	{0xffe00c00, 0xb8800c00, LDRSW, instArgs{arg_Xt, arg_Xns_mem_wb_imm9_1_signed}, nil},
	// LDRSW <Xt>, [<Xn|SP>{, #<pimm>}]
	{0xffc00000, 0xb9800000, LDRSW, instArgs{arg_Xt, arg_Xns_mem_optional_imm12_4_unsigned}, nil},

	MOVBU.W 16(R16), R10       <=>      ldrb x10, [x16,#16]!

3. Go uses a series of MOV instructions as load and store.

64-bit variant ldr, str, stur => MOVD;
32-bit variant str, stur, ldrsw => MOVW;
32-bit variant ldr => MOVWU;
ldrb => MOVBU; ldrh => MOVHU;
ldrsb, sturb, strb => MOVB;
ldrsh, sturh, strh =>  MOVH.

4. Go moves conditions into opcode suffix, like BLT.

{"Name":"LDRSW (immediate)","Bits":"1|0|1|1|1|0|0|0|1|0|0|imm9:9|0|1|Rn:5|Rt:5","Arch":"Post-index Post-index variant","Syntax":"LDRSW <Xt>, [<Xn|SP>], #<simm>","Code":"","Alias":""},
{"Name":"LDRSW (immediate)","Bits":"1|0|1|1|1|0|0|0|1|0|0|imm9:9|1|1|Rn:5|Rt:5","Arch":"Pre-index Pre-index variant","Syntax":"LDRSW <Xt>, [<Xn|SP>, #<simm>]!","Code":"","Alias":""},