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Results 1 - 10 of 13 for MULS (0.04 sec)

  1. src/crypto/internal/edwards25519/tables.go

    	"crypto/subtle"
    )
    
    // A dynamic lookup table for variable-base, constant-time scalar muls.
    type projLookupTable struct {
    	points [8]projCached
    }
    
    // A precomputed lookup table for fixed-base, constant-time scalar muls.
    type affineLookupTable struct {
    	points [8]affineCached
    }
    
    // A dynamic lookup table for variable-base, variable-time scalar muls.
    type nafLookupTable5 struct {
    	points [8]projCached
    }
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat Nov 05 21:02:45 UTC 2022
    - 3.7K bytes
    - Viewed (0)
  2. src/cmd/internal/obj/arm/anames.go

    	"DIV",
    	"MOD",
    	"MODU",
    	"DIVHW",
    	"DIVUHW",
    	"MOVB",
    	"MOVBS",
    	"MOVBU",
    	"MOVH",
    	"MOVHS",
    	"MOVHU",
    	"MOVW",
    	"MOVM",
    	"SWPBU",
    	"SWPW",
    	"RFE",
    	"SWI",
    	"MULA",
    	"MULS",
    	"MMULA",
    	"MMULS",
    	"WORD",
    	"MULL",
    	"MULAL",
    	"MULLU",
    	"MULALU",
    	"BX",
    	"BXRET",
    	"DWORD",
    	"LDREX",
    	"STREX",
    	"LDREXD",
    	"STREXD",
    	"DMB",
    	"PLD",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Oct 16 15:58:33 UTC 2019
    - 1.4K bytes
    - Viewed (0)
  3. test/codegen/arithmetic.go

    	r2 := b*64 + c
    	return r0, r1, r2
    }
    
    func MULS(a, b, c uint32) (uint32, uint32, uint32) {
    	// arm/7:`MULS`,-`MUL\s`
    	// arm/6:`SUB`,`MUL\s`,-`MULS`
    	// arm64:`MSUBW`,-`MULW`
    	r0 := c - a*b
    	// arm/7:`MULS`,-`MUL\s`
    	// arm/6:`SUB`,`MUL\s`,-`MULS`
    	// arm64:`MSUBW`,-`MULW`
    	r1 := a - c*79
    	// arm/7:`SUB`,-`MULS`,-`MUL\s`
    	// arm64:`SUB`,-`MSUBW`,-`MULW`
    	// ppc64x:`SUB`,-`MULLD`
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri May 17 15:28:00 UTC 2024
    - 15.2K bytes
    - Viewed (0)
  4. src/crypto/internal/nistec/p256_ordinv.go

    		4, 3, 3, 5, 9,
    		6, 2, 5, 6, 5,
    		4, 5, 5, 3, 10,
    		2, 5, 5, 3, 7, 6}
    	muls := []*p256OrdElement{
    		_101111, _111, _11, _1111, _10101,
    		_101, _101, _101, _111, _101111,
    		_1111, _1, _1, _1111, _111,
    		_111, _111, _101, _11, _101111,
    		_11, _11, _11, _1, _10101, _1111}
    
    	for i, s := range sqrs {
    		p256OrdSqr(x, x, s)
    		p256OrdMul(x, x, muls[i])
    	}
    
    	// Montgomery multiplication by R⁻¹, or 1 outside the domain as R⁻¹×R = 1,
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 3K bytes
    - Viewed (0)
  5. src/cmd/compile/internal/ssa/_gen/ARM.rules

    (MULS x (MOVWconst [c]) a) && c == -1 => (ADD a x)
    (MULS _ (MOVWconst [0]) a) => a
    (MULS x (MOVWconst [1]) a) => (RSB x a)
    (MULS x (MOVWconst [c]) a) && isPowerOfTwo32(c) => (RSB (SLLconst <x.Type> [int32(log32(c))] x) a)
    (MULS x (MOVWconst [c]) a) && isPowerOfTwo32(c-1) && c >= 3 => (RSB (ADDshiftLL <x.Type> x x [int32(log32(c-1))]) a)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Nov 20 17:19:36 UTC 2023
    - 90.1K bytes
    - Viewed (0)
  6. src/cmd/asm/internal/asm/testdata/armerror.s

    	MOVD	0x00ffffff(F2), F1 // ERROR "illegal base register"
    	MOVF	F2, 0x00ffffff(F2) // ERROR "illegal base register"
    	MOVD	F2, 0x00ffffff(F2) // ERROR "illegal base register"
    	MULS.S	R1, R2, R3, R4     // ERROR "invalid .S suffix"
    	ADD.P	R1, R2, R3         // ERROR "invalid .P suffix"
    	SUB.W	R2, R3             // ERROR "invalid .W suffix"
    	BL	4(R4)              // ERROR "non-zero offset"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Nov 03 14:06:21 UTC 2017
    - 14.4K bytes
    - Viewed (0)
  7. src/cmd/asm/internal/arch/arm.go

    		((x5 & 7) << 5) | // coprocessor information
    		(1 << 4) /* must be set */
    	return offset, arm.AMRC, true
    }
    
    // IsARMMULA reports whether the op (as defined by an arm.A* constant) is
    // MULA, MULS, MMULA, MMULS, MULABB, MULAWB or MULAWT, the 4-operand instructions.
    func IsARMMULA(op obj.As) bool {
    	switch op {
    	case arm.AMULA, arm.AMULS, arm.AMMULA, arm.AMMULS, arm.AMULABB, arm.AMULAWB, arm.AMULAWT:
    		return true
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Nov 18 17:59:44 UTC 2022
    - 6.1K bytes
    - Viewed (0)
  8. src/cmd/compile/internal/ssa/rewriteARM.go

    	v_0 := v.Args[0]
    	b := v.Block
    	// match: (MULS x (MOVWconst [c]) a)
    	// cond: c == -1
    	// result: (ADD a x)
    	for {
    		x := v_0
    		if v_1.Op != OpARMMOVWconst {
    			break
    		}
    		c := auxIntToInt32(v_1.AuxInt)
    		a := v_2
    		if !(c == -1) {
    			break
    		}
    		v.reset(OpARMADD)
    		v.AddArg2(a, x)
    		return true
    	}
    	// match: (MULS _ (MOVWconst [0]) a)
    	// result: a
    	for {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Nov 20 17:19:36 UTC 2023
    - 486.8K bytes
    - Viewed (0)
  9. src/cmd/compile/internal/ssa/_gen/ARMOps.go

    		{name: "MULA", argLength: 3, reg: gp31, asm: "MULA"},                      // arg0 * arg1 + arg2
    		{name: "MULS", argLength: 3, reg: gp31, asm: "MULS"},                      // arg2 - arg0 * arg1
    
    		{name: "ADDF", argLength: 2, reg: fp21, asm: "ADDF", commutative: true},   // arg0 + arg1
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Feb 24 00:21:13 UTC 2023
    - 41K bytes
    - Viewed (0)
  10. src/cmd/asm/internal/asm/testdata/arm.s

    	MOVW	R0, R1<<0(R2)        // 010082e7
    	MOVW	R0, R1>>0(R2)        // 010082e7
    	MOVW	R0, R1->0(R2)        // 010082e7
    	MOVW	R0, R1@>0(R2)        // 010082e7
    
    // MULA / MULS
    	MULAWT		R1, R2, R3, R4       // c23124e1
    	MULAWB		R1, R2, R3, R4       // 823124e1
    	MULS		R1, R2, R3, R4       // 923164e0
    	MULA		R1, R2, R3, R4       // 923124e0
    	MULA.S		R1, R2, R3, R4       // 923134e0
    	MMULA		R1, R2, R3, R4       // 123154e7
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Dec 15 20:51:01 UTC 2023
    - 69K bytes
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