"DIVF",
	"DIVD",
	"SQRTF",
	"SQRTD",
	"ABSF",
	"ABSD",
	"NEGF",
	"NEGD",
	"SRL",
	"SRA",
	"SLL",
	"MULU",
	"DIVU",
	"MUL",
	"MMUL",
	"DIV",
	"MOD",
	"MODU",
	"DIVHW",
	"DIVUHW",
	"MOVB",
	"MOVBS",
	"MOVBU",
	"MOVH",
	"MOVHS",
	"MOVHU",
	"MOVW",
	"MOVM",
	"SWPBU",
	"SWPW",
	"RFE",
	"SWI",
	"MULA",
	"MULS",
	"MMULA",
	"MMULS",
	"WORD",

	CMN 	RM, Rr // t = r-d
	SUB.CS	RM, Rr, Rr // if (t<-d || t>=0) r=r+d
	ADD.CC	$1, Rq
	ADD.PL	RM<<1, Rr
	ADD.PL	$2, Rq
	RET

// use hardware divider
udiv_hardware:
	DIVUHW	Rq, Rr, Rs
	MUL	Rs, Rq, RM
	RSB	Rr, RM, Rr
	MOVW	Rs, Rq
	RET

udiv_by_large_d:
	// at this point we know d>=2^(31-6)=2^25
	SUB 	$4, Ra, Ra
	RSB 	$0, Rs, Rs
	MOVW	Ra>>Rs, Rq
	MULLU	Rq, Rr, (Rq,Rs)

	XTAHU	R5@>24, R9, R1       // 751cf9e6

// DIVHW R0, R1, R2: R1 / R0 -> R2
	DIVHW	R0, R1, R2           // 11f012e7
	DIVUHW	R0, R1, R2           // 11f032e7
// DIVHW R0, R1: R1 / R0 -> R1
	DIVHW	R0, R1               // 11f011e7
	DIVUHW	R0, R1               // 11f031e7

// misc
	CLZ	R1, R2         // 112f6fe1
	WORD	$0             // 00000000
	WORD	$4294967295    // ffffffff