MOVB	F0, R0             // ERROR "illegal combination"
	MOVH	F0, R0             // ERROR "illegal combination"
	MOVB	R0, F0             // ERROR "illegal combination"
	MOVH	R0, F0             // ERROR "illegal combination"
	MOVB	R0>>0(R1), R2      // ERROR "bad shift"
	MOVB	R0->0(R1), R2      // ERROR "bad shift"
	MOVB	R0@>0(R1), R2      // ERROR "bad shift"
	MOVBS	R0>>0(R1), R2      // ERROR "bad shift"

	{"$0", "$0"},
	{"$256", "$256"},
	{"(R0)", "(R0)"},
	{"(R11)", "(R11)"},
	{"(g)", "(g)"},
	{"-12(R4)", "-12(R4)"},
	{"0(PC)", "0(PC)"},
	{"1024", "1024"},
	{"12(R(1))", "12(R1)"},
	{"12(R13)", "12(R13)"},
	{"R0", "R0"},
	{"R0->(32-1)", "R0->31"},
	{"R0<<R1", "R0<<R1"},
	{"R0>>R(1)", "R0>>R1"},
	{"R0@>(32-1)", "R0@>31"},
	{"R1", "R1"},
	{"R11", "R11"},
	{"R12", "R12"},

	AND	R0->28, R1           // 401e01e0
	AND	R0@>28, R1           // 601e01e0
	AND.S	R0<<28, R1           // 001e11e0
	AND.S	R0>>28, R1           // 201e11e0
	AND.S	R0->28, R1           // 401e11e0
	AND.S	R0@>28, R1           // 601e11e0
	AND	R0<<R1, R2, R3       // 103102e0
	AND	R0>>R1, R2, R3       // 303102e0
	AND	R0->R1, R2, R3       // 503102e0
	AND	R0@>R1, R2, R3       // 703102e0
	AND.S	R0<<R1, R2, R3       // 103112e0

	CMP R3, R0                      // 7c230000
	CMP R3, R0, CR1                 // CMP R3,CR1,R0   // 7ca30000
	CMPU R3, R4                     // 7c232040
	CMPU R3, R0                     // 7c230040
	CMPU R3, R0, CR2                // CMPU R3,CR2,R0  // 7d230040
	CMPW R3, R4                     // 7c032000
	CMPW R3, R0                     // 7c030000
	CMPW R3, R0, CR3                // CMPW R3,CR3,R0  // 7d830000

</li>

<li>
<code>(R2)(R0)</code>:
The location at <code>R0</code> plus <code>R2</code>.
</li>

<li>
<code>R0.UXTB</code>
<br>
<code>R0.UXTB&lt;&lt;imm</code>:
<code>UXTB</code>: extract an 8-bit value from the low-order bits of <code>R0</code> and zero-extend it to the size of <code>R0</code>.
<code>R0.UXTB&lt;&lt;imm</code>: left shift the result of <code>R0.UXTB</code> by <code>imm</code> bits.

	RXSBGT	$17, $8, $16, R9, R10 // eca991081057
	ROSBGT	$9, $24, $11, R11, R0 // ec0b89180b56
	RISBG	$0, $31, $32, R1, R2  // ec21001f2055
	RISBGN	$17, $8, $16, R3, R4  // ec4311081059
	RISBGZ	$9, $24, $11, R5, R6  // ec6509980b55
	RISBGNZ	$0, $31, $32, R7, R8  // ec87009f2059
	RISBHG	$17, $8, $16, R9, R10 // eca91108105d
	RISBLG	$9, $24, $11, R11, R0 // ec0b09180b51
	RISBHGZ	$17, $8, $16, R9, R10 // eca91188105d

	VREV16	V1.H4, V2.H4                                     // ERROR "invalid arrangement"
	FLDPQ	(R0), (R1, R2)                                   // ERROR "invalid register pair"
	FLDPQ	(R1), (F2, F2)                                   // ERROR "constrained unpredictable behavior"
	FSTPQ	(R1, R2), (R0)                                   // ERROR "invalid register pair"
	FLDPD	(R0), (R1, R2)                                   // ERROR "invalid register pair"

    Table<String, String, String> table = HashBasedTable.create();
    for (int i = 0; i < 5; i++) {
      table.put("r" + i, "c" + i, "v" + i);
    }
    assertThat(table.rowKeySet()).containsExactly("r0", "r1", "r2", "r3", "r4").inOrder();
    assertThat(table.columnKeySet()).containsExactly("c0", "c1", "c2", "c3", "c4").inOrder();
    assertThat(table.values()).containsExactly("v0", "v1", "v2", "v3", "v4").inOrder();
  }

is in [0, 15]. func decompose32(r fieldElement) (r1 byte, r0 int32) { x := fieldFromMontgomery(r) r1 = highBits32(x) // r - r1 * (2 * γ2) mod± q r0 = int32(x) - int32(r1)*2*(q-1)/32 r0 = constantTimeSelectLe(q/2+1, r0, r0-q, r0) return r1, r0 } // useHint32 implements UseHint from FIPS 204 for γ2 = (q - 1) / 32. func useHint32(r fieldElement, hint byte) byte { const m = 16 // (q − 1) / (2 * γ2) r1, r0 := decompose32(r) if hint == 1 { if r0 > 0 { r1 = (r1 + 1) % m } else { // Underflow is safe, because...

		return 10
	}
	if name[0] != 'R' {
		p.errorf("expected g or R0 through R15; found %s", name)
		return 0
	}
	r, ok := p.registerReference(name)
	if !ok {
		return 0
	}
	reg := r - p.arch.Register["R0"]
	if reg < 0 {
		// Could happen for an architecture having other registers prefixed by R
		p.errorf("expected g or R0 through R15; found %s", name)
		return 0
	}
	return uint16(reg)
}