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  1. src/cmd/asm/internal/asm/testdata/arm.s

    	MOVHU.P	-0x24(R9), R8        // MOVHU.P -36(R9), R8       // b48259e0
    	MOVH	-0x24(R9), R8        // MOVH -36(R9), R8          // f48259e1
    	MOVH.W	-0x24(R9), R8        // MOVH.W -36(R9), R8        // f48279e1
    	MOVH.P	-0x24(R9), R8        // MOVH.P -36(R9), R8        // f48259e0
    	MOVHS	-0x24(R9), R8        // MOVHS -36(R9), R8         // f48259e1
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Fri Dec 15 20:51:01 GMT 2023
    - 69K bytes
    - Click Count (0)
  2. src/cmd/asm/internal/asm/testdata/mips64.s

    //		outcode(int($1), &$2, int($4), &$6);
    //	}
    	ADD	R5, R9, R10	// 01255020
    	ADDU	R13, R14, R19	// 01cd9821
    	ADDV	R5, R9, R10	// 0125502c
    	ADDVU	R13, R14, R19	// 01cd982d
    
    //	LADDW imm ',' sreg ',' rreg
    //	{
    //		outcode(int($1), &$2, int($4), &$6);
    //	}
    	ADD	$15176, R14, R9	// 21c93b48
    	ADD	$-9, R5, R8	// 20a8fff7
    	ADDU	$10, R9, R9	// 2529000a
    	ADDV	$15176, R14, R9	// 61c93b48
    	ADDV	$-9, R5, R8	// 60a8fff7
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Tue Aug 08 12:17:12 GMT 2023
    - 12.4K bytes
    - Click Count (0)
  3. src/cmd/asm/internal/asm/testdata/s390x.s

    	RISBLGZ	$9, $24, $11, R11, R0 // ec0b09980b51
    
    	LAA	R1, R2, 524287(R3)    // eb213fff7ff8
    	LAAG	R4, R5, -524288(R6)   // eb54600080e8
    	LAAL	R7, R8, 8192(R9)      // eb87900002fa
    	LAALG	R10, R11, -8192(R12)  // ebbac000feea
    	LAN	R1, R2, (R3)          // eb21300000f4
    	LANG	R4, R5, (R6)          // eb54600000e4
    	LAX	R7, R8, (R9)          // eb87900000f7
    	LAXG	R10, R11, (R12)       // ebbac00000e7
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Wed Jul 30 19:29:15 GMT 2025
    - 22.9K bytes
    - Click Count (0)
  4. lib/fips140/v1.26.0.zip

    high x[i+1]*y ADDC R17, R14 ADDZE R15 ADDC R9, R14 ADDZE R15, R9 MULLD R5, R18, R16 // low x[i+2]*y MULHDU R5, R18, R17 // high x[i+2]*y ADDC R19, R16 ADDZE R17 ADDC R9, R16 ADDZE R17, R9 MULLD R5, R20, R18 // low x[i+3]*y MULHDU R5, R20, R19 // high x[i+3]*y ADDC R21, R18 ADDZE R19 ADDC R9, R18 ADDZE R19, R9 MOVD R10, 0(R3) // z[i] MOVD R14, 8(R3) // z[i+1] MOVD R16, 16(R3) // z[i+2] MOVD R18, 24(R3) // z[i+3] ADD $32, R3 ADD $32, R4 BDNZ loop done: MOVD R9, c+24(FP) RET golang.org/fips140@v1.26.0...
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Thu Jan 08 17:58:32 GMT 2026
    - 660.3K bytes
    - Click Count (0)
  5. src/cmd/asm/internal/asm/testdata/armv6.s

    	MOVFD	F0, F1        // c01ab7ee
    	MOVDF	F4, F5        // c45bb7ee
    
    	LDREX	(R8), R9      // 9f9f98e1
    	LDREXB	(R11), R12    // 9fcfdbe1
    	LDREXD	(R11), R12    // 9fcfbbe1
    	STREX	R3, (R4), R5  // STREX  (R4), R3, R5 // 935f84e1
    	STREXB	R8, (R9), g   // STREXB (R9), R8, g  // 98afc9e1
    	STREXD	R8, (R9), g   // STREXD (R9), R8, g  // 98afa9e1
    
    	CMPF    F8, F9        // c89ab4ee10faf1ee
    	CMPD.CS F4, F5        // c45bb42e10faf12e
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Wed Oct 23 15:18:14 GMT 2024
    - 4.7K bytes
    - Click Count (0)
  6. src/cmd/asm/internal/asm/operand_test.go

    	{"(BP)(CX*4)", "(BP)(CX*4)"},
    	{"(BP)(DX*4)", "(BP)(DX*4)"},
    	{"(BP)(R8*4)", "(BP)(R8*4)"},
    	{"(BX)", "(BX)"},
    	{"(DI)", "(DI)"},
    	{"(DI)(BX*1)", "(DI)(BX*1)"},
    	{"(DX)", "(DX)"},
    	{"(R9)", "(R9)"},
    	{"(R9)(BX*8)", "(R9)(BX*8)"},
    	{"(SI)", "(SI)"},
    	{"(SI)(BX*1)", "(SI)(BX*1)"},
    	{"(SI)(DX*1)", "(SI)(DX*1)"},
    	{"(SP)", "(SP)"},
    	{"(SP)(AX*4)", "(SP)(AX*4)"},
    	{"32(SP)(BX*2)", "32(SP)(BX*2)"},
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Tue Aug 29 18:31:05 GMT 2023
    - 23.9K bytes
    - Click Count (0)
  7. src/cmd/asm/internal/asm/testdata/armerror.s

    	MOVW.S	$124, R1           // ERROR "invalid .S suffix"
    	MVN.S	$123, g            // ERROR "invalid .S suffix"
    	RSB.U	$0, R9             // ERROR "invalid .U suffix"
    	CMP.S	$29, g             // ERROR "invalid .S suffix"
    	ADD.W	R1<<R2, R3         // ERROR "invalid .W suffix"
    	SUB.U	R1<<R2, R3, R9     // ERROR "invalid .U suffix"
    	CMN.S	R5->R2, R1         // ERROR "invalid .S suffix"
    	SLL.P	R1, R2, R3         // ERROR "invalid .P suffix"
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Wed Oct 23 15:18:14 GMT 2024
    - 14.5K bytes
    - Click Count (0)
  8. src/cmd/asm/internal/asm/testdata/arm64error.s

    	VLD1.P	(R8)(R9.SXTX<<2), [V2.B16]                       // ERROR "invalid extended register"
    	VLD1.P	(R8)(R9<<2), [V2.B16]                            // ERROR "invalid extended register"
    	VST1.P	[V1.B16], (R8)(R9.UXTW)                          // ERROR "invalid extended register"
    	VST1.P	[V1.B16], (R8)(R9<<1)                            // ERROR "invalid extended register"
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Tue Feb 24 21:29:25 GMT 2026
    - 38.5K bytes
    - Click Count (0)
  9. doc/asm.html

    The range of registers is specified by a start register and an end register.
    For example, <code>LMG</code> <code>(R9),</code> <code>R5,</code> <code>R7</code> would load
    <code>R5</code>, <code>R6</code> and <code>R7</code> with the 64-bit values at
    <code>0(R9)</code>, <code>8(R9)</code> and <code>16(R9)</code> respectively.
    </p>
    
    <p>
    Storage-and-storage instructions such as <code>MVC</code> and <code>XC</code> are written
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Fri Nov 14 19:09:46 GMT 2025
    - 36.5K bytes
    - Click Count (0)
  10. src/cmd/asm/internal/asm/asm.go

    		Type:  obj.TYPE_BRANCH,
    		Index: 0,
    	}
    	addr.Val = target
    }
    
    func isARM64SVE(op obj.As) bool {
    	return op > arm64.ASVESTART
    }
    
    // asmInstruction assembles an instruction.
    // MOVW R9, (R10)
    func (p *Parser) asmInstruction(op obj.As, cond string, a []obj.Addr) {
    	// fmt.Printf("%s %+v\n", op, a)
    	prog := &obj.Prog{
    		Ctxt: p.ctxt,
    		Pos:  p.pos(),
    		As:   op,
    	}
    	switch len(a) {
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Fri Mar 20 17:02:17 GMT 2026
    - 27.5K bytes
    - Click Count (0)
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