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Results 1 - 9 of 9 for MRS (0.02 sec)

  1. src/runtime/tls_arm64.h

    #endif
    #ifdef TLS_linux
    #define MRS_TPIDR_R0 WORD $0xd53bd040 // MRS TPIDR_EL0, R0
    #endif
    
    #ifdef GOOS_darwin
    #define TLS_darwin
    #endif
    #ifdef GOOS_ios
    #define TLS_darwin
    #endif
    #ifdef TLS_darwin
    #define TLSG_IS_VARIABLE
    #define MRS_TPIDR_R0 WORD $0xd53bd060 // MRS TPIDRRO_EL0, R0
    #endif
    
    #ifdef GOOS_freebsd
    #define MRS_TPIDR_R0 WORD $0xd53bd040 // MRS TPIDR_EL0, R0
    #endif
    
    #ifdef GOOS_netbsd
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 22 20:46:22 UTC 2022
    - 1.1K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/arm64.s

    	MRS	DBGBCR2_EL1, R22                   // b60230d5
    	MRS	DBGBCR3_EL1, R8                    // a80330d5
    	MRS	DBGBCR4_EL1, R2                    // a20430d5
    	MRS	DBGBCR5_EL1, R4                    // a40530d5
    	MRS	DBGBCR6_EL1, R2                    // a20630d5
    	MRS	DBGBCR7_EL1, R6                    // a60730d5
    	MRS	DBGBCR8_EL1, R1                    // a10830d5
    	MRS	DBGBCR9_EL1, R16                   // b00930d5
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Dec 08 03:28:17 UTC 2023
    - 94.9K bytes
    - Viewed (0)
  3. src/vendor/golang.org/x/sys/cpu/cpu_arm64.s

    // func getisar0() uint64
    TEXT ·getisar0(SB),NOSPLIT,$0-8
    	// get Instruction Set Attributes 0 into x0
    	// mrs x0, ID_AA64ISAR0_EL1 = d5380600
    	WORD	$0xd5380600
    	MOVD	R0, ret+0(FP)
    	RET
    
    // func getisar1() uint64
    TEXT ·getisar1(SB),NOSPLIT,$0-8
    	// get Instruction Set Attributes 1 into x0
    	// mrs x0, ID_AA64ISAR1_EL1 = d5380620
    	WORD	$0xd5380620
    	MOVD	R0, ret+0(FP)
    	RET
    
    // func getpfr0() uint64
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 08 16:12:58 UTC 2024
    - 937 bytes
    - Viewed (0)
  4. src/cmd/asm/internal/asm/testdata/arm64error.s

    	MRS	ICC_EOIR1_EL1, R5                                // ERROR "system register is not readable"
    	MRS	ICC_EOIR0_EL1, R5                                // ERROR "system register is not readable"
    	MRS	ICC_DIR_EL1, R5                                  // ERROR "system register is not readable"
    	MRS	ICC_ASGI1R_EL1, R5                               // ERROR "system register is not readable"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Dec 08 03:28:17 UTC 2023
    - 37.8K bytes
    - Viewed (0)
  5. src/cmd/internal/obj/arm64/anames.go

    	"MOVH",
    	"MOVHU",
    	"MOVK",
    	"MOVKW",
    	"MOVN",
    	"MOVNW",
    	"MOVP",
    	"MOVPD",
    	"MOVPQ",
    	"MOVPS",
    	"MOVPSW",
    	"MOVPW",
    	"MOVW",
    	"MOVWU",
    	"MOVZ",
    	"MOVZW",
    	"MRS",
    	"MSR",
    	"MSUB",
    	"MSUBW",
    	"MUL",
    	"MULW",
    	"MVN",
    	"MVNW",
    	"NEG",
    	"NEGS",
    	"NEGSW",
    	"NEGW",
    	"NGC",
    	"NGCS",
    	"NGCSW",
    	"NGCW",
    	"NOOP",
    	"ORN",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 18 01:40:37 UTC 2023
    - 5.4K bytes
    - Viewed (0)
  6. src/runtime/memclr_arm64.s

    	// DCZID_EL0 bit assignments
    	// [63:5] Reserved
    	// [4]    DZP, if bit set DC ZVA instruction is prohibited, else permitted
    	// [3:0]  log2 of the block size in words, eg. if it returns 0x4 then block size is 16 words
    	MRS	DCZID_EL0, R3
    	TBZ	$4, R3, init
    	// ZVA not available
    	MOVW	$~0, R5
    	MOVW	R5, block_size<>(SB)
    	B	no_zva
    
    init:
    	MOVW	$4, R9
    	ANDW	$15, R3, R5
    	LSLW	R5, R9, R5
    	MOVW	R5, block_size<>(SB)
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Mar 18 18:26:13 UTC 2022
    - 3.6K bytes
    - Viewed (0)
  7. src/runtime/sys_freebsd_arm64.s

    TEXT runtime·getCntxct(SB),NOSPLIT,$0
    	MOVB	physical+0(FP), R0
    	CMP	$0, R0
    	BEQ	3(PC)
    
    	// get CNTPCT (Physical Count Register) into R0
    	MRS	CNTPCT_EL0, R0
    	B	2(PC)
    
    	// get CNTVCT (Virtual Count Register) into R0
    	MRS	CNTVCT_EL0, R0
    
    	MOVW	R0, ret+8(FP)
    	RET
    
    // func issetugid() int32
    TEXT runtime·issetugid(SB),NOSPLIT|NOFRAME,$0
    	MOVD $SYS_issetugid, R8
    	SVC
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Jun 06 18:49:01 UTC 2023
    - 9.5K bytes
    - Viewed (0)
  8. src/cmd/asm/internal/asm/testdata/arm64enc.s

    	MSR $1, SPSel                              // bf4100d5
    	MSR $9, DAIFSet                            // df4903d5
    	MSR $6, DAIFClr                            // ff4603d5
    	MRS ELR_EL1, R8                            // 284038d5
    	MSR R16, ELR_EL1                           // 304018d5
    	MRS DCZID_EL0, R3                          // e3003bd5
    	MSUBW R1, R1, R12, R5                      // 8585011b
    	MSUB R19, R16, R26, R2                     // 42c3139b
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Jul 24 01:11:41 UTC 2023
    - 43.9K bytes
    - Viewed (0)
  9. src/cmd/internal/obj/arm64/asm7.go

    		o2 |= LSL0_64
    
    	case 35: /* mov SPR,R -> mrs */
    		o1 = c.oprrr(p, AMRS)
    
    		// SysRegEnc function returns the system register encoding and accessFlags.
    		_, v, accessFlags := SysRegEnc(p.From.Reg)
    		if v == 0 {
    			c.ctxt.Diag("illegal system register:\n%v", p)
    		}
    		if (o1 & (v &^ (3 << 19))) != 0 {
    			c.ctxt.Diag("MRS register value overlap\n%v", p)
    		}
    		if accessFlags&SR_READ == 0 {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 15 15:44:14 UTC 2024
    - 201.1K bytes
    - Viewed (0)
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