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Results 1 - 10 of 75 for instruction (0.09 sec)

  1. src/cmd/asm/internal/arch/arch.go

    	instructions["JZ"] = x86.AJEQ   /* alternate */
    	instructions["MASKMOVDQU"] = x86.AMASKMOVOU
    	instructions["MOVD"] = x86.AMOVQ
    	instructions["MOVDQ2Q"] = x86.AMOVQ
    	instructions["MOVNTDQ"] = x86.AMOVNTO
    	instructions["MOVOA"] = x86.AMOVO
    	instructions["PSLLDQ"] = x86.APSLLO
    	instructions["PSRLDQ"] = x86.APSRLO
    	instructions["PADDD"] = x86.APADDL
    	// Spellings originally used in CL 97235.
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Thu Oct 24 12:32:56 UTC 2024
    - 21.5K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/asm.go

    		}
    		p.errorf("wrong number of arguments to %s instruction", op)
    		return
    	case 4:
    		if p.arch.Family == sys.S390X || p.arch.Family == sys.PPC64 {
    			// 4-operand compare-and-branch.
    			prog.From = a[0]
    			prog.Reg = p.getRegister(prog, op, &a[1])
    			prog.AddRestSource(a[2])
    			target = &a[3]
    			break
    		}
    		p.errorf("wrong number of arguments to %s instruction", op)
    		return
    	default:
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Mon Oct 21 14:11:44 UTC 2024
    - 25.5K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/arch/arm.go

    // BFX-like instructions which are in the form of "op $width, $LSB, (Reg,) Reg".
    func IsARMBFX(op obj.As) bool {
    	switch op {
    	case arm.ABFX, arm.ABFXU, arm.ABFC, arm.ABFI:
    		return true
    	}
    	return false
    }
    
    // IsARMFloatCmp reports whether the op is a floating comparison instruction.
    func IsARMFloatCmp(op obj.As) bool {
    	switch op {
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Oct 23 15:18:14 UTC 2024
    - 6.1K bytes
    - Viewed (0)
  4. src/cmd/asm/internal/asm/testdata/riscv64.s

    	// NOT pseudo-instruction
    	NOT	X5					// 93c2f2ff
    	NOT	X5, X6					// 13c3f2ff
    
    	// NEG/NEGW pseudo-instructions
    	NEG	X5					// b3025040
    	NEG	X5, X6					// 33035040
    	NEGW	X5					// bb025040
    	NEGW	X5, X6					// 3b035040
    
    	// This jumps to the second instruction in the function (the
    	// first instruction is an invisible stack pointer adjustment).
    	JMP	start					// JMP	2
    
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Fri Oct 25 12:05:29 UTC 2024
    - 16.8K bytes
    - Viewed (0)
  5. src/cmd/asm/internal/asm/parse.go

    		if !ok {
    			break
    		}
    		scratch = operands
    
    		if p.pseudo(word, operands) {
    			continue
    		}
    		i, present := p.arch.Instructions[word]
    		if present {
    			p.instruction(i, word, cond, operands)
    			continue
    		}
    		p.errorf("unrecognized instruction %q", word)
    	}
    	if p.errorCount > 0 {
    		return nil, false
    	}
    	p.patch()
    	return p.firstProg, true
    }
    
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Sep 04 18:16:59 UTC 2024
    - 36.9K bytes
    - Viewed (0)
  6. guava/src/com/google/common/hash/LittleEndianByteArray.java

        return (byteArray instanceof UnsafeByteArray);
      }
    
      /**
       * Common interface for retrieving a 64-bit long from a little-endian byte array.
       *
       * <p>This abstraction allows us to use single-instruction load and put when available, or fall
       * back on the slower approach of using Longs.fromBytes(byte...).
       */
      private interface LittleEndianBytes {
        long getLongLittleEndian(byte[] array, int offset);
    
    Registered: Fri Nov 01 12:43:10 UTC 2024
    - Last Modified: Sat Oct 19 00:26:48 UTC 2024
    - 9.8K bytes
    - Viewed (0)
  7. .bazelrc

    #
    # Macosx options
    #     darwin_arm64:
    #
    # Compiler options:
    #     cuda_clang:             Use Clang when building CUDA code.
    #     avx_linux:              Build with avx instruction set on linux.
    #     avx_win:                Build with avx instruction set on windows
    #
    # Other build options:
    #     short_logs:       Only log errors during build, skip warnings.
    #     verbose_logs:     Show all compiler warnings during build.
    Registered: Tue Nov 05 12:39:12 UTC 2024
    - Last Modified: Mon Oct 28 22:02:31 UTC 2024
    - 51.3K bytes
    - Viewed (0)
  8. docs/en/docs/deployment/docker.md

    ///
    
    /// warning
    
    Make sure to **always** use the **exec form** of the `CMD` instruction, as explained below.
    
    ///
    
    #### Use `CMD` - Exec Form
    
    The <a href="https://docs.docker.com/reference/dockerfile/#cmd" class="external-link" target="_blank">`CMD`</a> Docker instruction can be written using two forms:
    
    ✅ **Exec** form:
    
    ```Dockerfile
    # ✅ Do this
    Registered: Sun Nov 03 07:19:11 UTC 2024
    - Last Modified: Wed Sep 18 16:09:57 UTC 2024
    - 28.5K bytes
    - Viewed (0)
  9. src/cmd/asm/internal/asm/testdata/s390x.s

    	MOVB	$255, 4096(R4)        // ebff40000152
    	MOVB	$-128, -524288(R5)    // eb8050008052
    	MOVB	$1, -524289(R6)       // c0a1fff7ffff41aa60009201a000
    
    	// RX (12-bit displacement) and RXY (20-bit displacement) instruction encoding (e.g: ST vs STY)
    	MOVW	R1, 4095(R2)(R3)       // 50132fff
    	MOVW	R1, 4096(R2)(R3)       // e31320000150
    	MOVWZ	R1, 4095(R2)(R3)       // 50132fff
    	MOVWZ	R1, 4096(R2)(R3)       // e31320000150
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Sep 18 15:49:24 UTC 2024
    - 22.1K bytes
    - Viewed (0)
  10. src/cmd/asm/internal/asm/testdata/ppc64.s

    // This contains the majority of valid opcode combinations
    // available in cmd/internal/obj/ppc64/asm9.go with
    // their valid instruction encodings.
    
    #include "../../../../../runtime/textflag.h"
    
    // In case of index mode instructions, usage of
    // (Rx)(R0) is equivalent to (Rx+R0)
    // In case of base+displacement mode instructions if
    // the offset is 0, usage of (Rx) is equivalent to 0(Rx)
    TEXT asmtest(SB),DUPOK|NOSPLIT,$0
    	// move constants
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Oct 29 13:14:38 UTC 2024
    - 51K bytes
    - Viewed (0)
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