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Results 1 - 6 of 6 for RORB (0.07 sec)
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test/codegen/rotate.go
return a } func rot8nc(x uint8, z uint) uint8 { var a uint8 z &= 7 // amd64:"ROLB",-"ANDQ" // riscv64: "OR","SLL","SRL",-"AND\t" a += x<<z | x>>(8-z) // amd64:"RORB",-"ANDQ" // riscv64: "OR","SLL","SRL",-"AND\t" a += x>>z | x<<(8-z) return a } // Issue 18254: rotate after inlining func f32(x uint32) uint32 { // amd64:"ROLL\t[$]7" return rot32nc(x, 7)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 14:57:07 UTC 2024 - 6K bytes - Viewed (0) -
src/cmd/internal/obj/x86/anames.go
"RDRANDQ", "RDRANDW", "RDSEEDL", "RDSEEDQ", "RDSEEDW", "RDTSC", "RDTSCP", "REP", "REPN", "RETFL", "RETFQ", "RETFW", "ROLB", "ROLL", "ROLQ", "ROLW", "RORB", "RORL", "RORQ", "RORW", "RORXL", "RORXQ", "ROUNDPD", "ROUNDPS", "ROUNDSD", "ROUNDSS", "RSM", "RSQRTPS", "RSQRTSS", "SAHF", "SALB", "SALL", "SALQ",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 11 18:32:50 UTC 2023 - 19.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64.rules
(ROLQ x (NEG(Q|L) y)) => (RORQ x y) (ROLL x (NEG(Q|L) y)) => (RORL x y) (ROLW x (NEG(Q|L) y)) => (RORW x y) (ROLB x (NEG(Q|L) y)) => (RORB x y) // rotate right negative = rotate left (RORQ x (NEG(Q|L) y)) => (ROLQ x y) (RORL x (NEG(Q|L) y)) => (ROLL x y) (RORW x (NEG(Q|L) y)) => (ROLW x y) (RORB x (NEG(Q|L) y)) => (ROLB x y) // rotate by constants (ROLQ x (MOV(Q|L)const [c])) => (ROLQconst [int8(c&63)] x)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 93.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
{name: "RORL", argLength: 2, reg: gp21shift, asm: "RORL", resultInArg0: true, clobberFlags: true}, {name: "RORW", argLength: 2, reg: gp21shift, asm: "RORW", resultInArg0: true, clobberFlags: true}, {name: "RORB", argLength: 2, reg: gp21shift, asm: "RORB", resultInArg0: true, clobberFlags: true}, {name: "ROLQconst", argLength: 1, reg: gp11, asm: "ROLQ", aux: "Int8", resultInArg0: true, clobberFlags: true},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Aug 04 16:40:24 UTC 2023 - 98K bytes - Viewed (1) -
src/cmd/compile/internal/ssa/rewriteAMD64.go
v_1 := v.Args[1] v_0 := v.Args[0] // match: (ROLB x (NEGQ y)) // result: (RORB x y) for { x := v_0 if v_1.Op != OpAMD64NEGQ { break } y := v_1.Args[0] v.reset(OpAMD64RORB) v.AddArg2(x, y) return true } // match: (ROLB x (NEGL y)) // result: (RORB x y) for { x := v_0 if v_1.Op != OpAMD64NEGL { break }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 712.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
{0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15 }, outputs: []outputInfo{ {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15 }, }, }, { name: "RORB", argLen: 2, resultInArg0: true, clobberFlags: true, asm: x86.ARORB, reg: regInfo{ inputs: []inputInfo{ {1, 2}, // CX
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0)