return a
}

func rot8nc(x uint8, z uint) uint8 {
	var a uint8

	z &= 7

	// amd64:"ROLB",-"ANDQ"
	// riscv64: "OR","SLL","SRL",-"AND\t"
	a += x<<z | x>>(8-z)

	// amd64:"RORB",-"ANDQ"
	// riscv64: "OR","SLL","SRL",-"AND\t"
	a += x>>z | x<<(8-z)

	return a
}

// Issue 18254: rotate after inlining
func f32(x uint32) uint32 {
	// amd64:"ROLL\t[$]7"
	return rot32nc(x, 7)

	"RDRANDQ",
	"RDRANDW",
	"RDSEEDL",
	"RDSEEDQ",
	"RDSEEDW",
	"RDTSC",
	"RDTSCP",
	"REP",
	"REPN",
	"RETFL",
	"RETFQ",
	"RETFW",
	"ROLB",
	"ROLL",
	"ROLQ",
	"ROLW",
	"RORB",
	"RORL",
	"RORQ",
	"RORW",
	"RORXL",
	"RORXQ",
	"ROUNDPD",
	"ROUNDPS",
	"ROUNDSD",
	"ROUNDSS",
	"RSM",
	"RSQRTPS",
	"RSQRTSS",
	"SAHF",
	"SALB",
	"SALL",
	"SALQ",

	RORB $1, (BX)                           // d00b
	RORB $1, (R11)                          // 41d00b
	RORB $1, DL                             // d0ca
	RORB $1, R11                            // 41d0cb
	RORB CL, (BX)                           // d20b
	RORB CL, (R11)                          // 41d20b
	RORB CL, DL                             // d2ca
	RORB CL, R11                            // 41d2cb

(ROLQ x (NEG(Q|L) y)) => (RORQ x y)
(ROLL x (NEG(Q|L) y)) => (RORL x y)
(ROLW x (NEG(Q|L) y)) => (RORW x y)
(ROLB x (NEG(Q|L) y)) => (RORB x y)

// rotate right negative = rotate left
(RORQ x (NEG(Q|L) y)) => (ROLQ x y)
(RORL x (NEG(Q|L) y)) => (ROLL x y)
(RORW x (NEG(Q|L) y)) => (ROLW x y)
(RORB x (NEG(Q|L) y)) => (ROLB x y)

// rotate by constants
(ROLQ x (MOV(Q|L)const [c])) => (ROLQconst [int8(c&63)] x)

		{name: "RORL", argLength: 2, reg: gp21shift, asm: "RORL", resultInArg0: true, clobberFlags: true},
		{name: "RORW", argLength: 2, reg: gp21shift, asm: "RORW", resultInArg0: true, clobberFlags: true},
		{name: "RORB", argLength: 2, reg: gp21shift, asm: "RORB", resultInArg0: true, clobberFlags: true},
		{name: "ROLQconst", argLength: 1, reg: gp11, asm: "ROLQ", aux: "Int8", resultInArg0: true, clobberFlags: true},

	v_1 := v.Args[1]
	v_0 := v.Args[0]
	// match: (ROLB x (NEGQ y))
	// result: (RORB x y)
	for {
		x := v_0
		if v_1.Op != OpAMD64NEGQ {
			break
		}
		y := v_1.Args[0]
		v.reset(OpAMD64RORB)
		v.AddArg2(x, y)
		return true
	}
	// match: (ROLB x (NEGL y))
	// result: (RORB x y)
	for {
		x := v_0
		if v_1.Op != OpAMD64NEGL {
			break
		}

				{0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
			},
			outputs: []outputInfo{
				{0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
			},
		},
	},
	{
		name:         "RORB",
		argLen:       2,
		resultInArg0: true,
		clobberFlags: true,
		asm:          x86.ARORB,
		reg: regInfo{
			inputs: []inputInfo{
				{1, 2},     // CX