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Results 1 - 9 of 9 for MOVWD (0.05 sec)
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src/cmd/internal/obj/mips/anames.go
"DIVU", "DIVW", "GOK", "LL", "LLV", "LUI", "MADD", "MOVB", "MOVBU", "MOVD", "MOVDF", "MOVDW", "MOVF", "MOVFD", "MOVFW", "MOVH", "MOVHU", "MOVW", "MOVWD", "MOVWF", "MOVWL", "MOVWR", "MSUB", "MUL", "MULD", "MULF", "MULU", "MULW", "NEGD", "NEGF", "NEGW", "NEGV", "NOOP", "NOR", "OR", "REM", "REMU", "RFE",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 08 12:17:12 UTC 2023 - 1.4K bytes - Viewed (0) -
src/cmd/internal/obj/loong64/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 1.9K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/arm/armasm/plan9x.go
{VCVT_EQ_F32_S32, []int{1, 0}, "VCVT", "MOVWF"}, {VCVT_EQ_S32_F32, []int{1, 0}, "VCVT", "MOVFW"}, {VCVT_EQ_U32_F32, []int{1, 0}, "VCVT", "MOVFW.U"}, {VCVT_EQ_F64_U32, []int{1, 0}, "VCVT", "MOVWD.U"}, {VCVT_EQ_F64_S32, []int{1, 0}, "VCVT", "MOVWD"}, {VCVT_EQ_S32_F64, []int{1, 0}, "VCVT", "MOVDW"}, {VCVT_EQ_U32_F64, []int{1, 0}, "VCVT", "MOVDW.U"}, } // convert FP instructions from GNU syntax to Plan 9 syntax, for example,
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:33 UTC 2023 - 11.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/loong64enc1.s
MASKEQZ R4, R5, R6 // a6101300 MASKNEZ R4, R5, R6 // a6901300 MOVFD F4, F5 // 85241901 MOVDF F4, F5 // 85181901 MOVWF F4, F5 // 85101d01 MOVFW F4, F5 // 85041b01 MOVWD F4, F5 // 85201d01 MOVDW F4, F5 // 85081b01 NEGF F4, F5 // 85141401 NEGD F4, F5 // 85181401 ABSD F4, F5 // 85081401 TRUNCDW F4, F5 // 85881a01 TRUNCFW F4, F5 // 85841a01
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 8.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go
{name: "MOVWF", argLength: 1, reg: fp11, asm: "MOVWF"}, // int32 -> float32 {name: "MOVWD", argLength: 1, reg: fp11, asm: "MOVWD"}, // int32 -> float64 {name: "MOVVF", argLength: 1, reg: fp11, asm: "MOVVF"}, // int64 -> float32 {name: "MOVVD", argLength: 1, reg: fp11, asm: "MOVVD"}, // int64 -> float64
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 19:04:19 UTC 2023 - 25.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/LOONG64.rules
(SignExt8to64 ...) => (MOVBreg ...) (SignExt16to64 ...) => (MOVHreg ...) (SignExt32to64 ...) => (MOVWreg ...) // float <=> int conversion (Cvt32to32F ...) => (MOVWF ...) (Cvt32to64F ...) => (MOVWD ...) (Cvt64to32F ...) => (MOVVF ...) (Cvt64to64F ...) => (MOVVD ...) (Cvt32Fto32 ...) => (TRUNCFW ...) (Cvt64Fto32 ...) => (TRUNCDW ...) (Cvt32Fto64 ...) => (TRUNCFV ...) (Cvt64Fto64 ...) => (TRUNCDV ...)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 19:26:25 UTC 2023 - 31.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/MIPS64.rules
(SignExt8to64 ...) => (MOVBreg ...) (SignExt16to64 ...) => (MOVHreg ...) (SignExt32to64 ...) => (MOVWreg ...) // float <=> int conversion (Cvt32to32F ...) => (MOVWF ...) (Cvt32to64F ...) => (MOVWD ...) (Cvt64to32F ...) => (MOVVF ...) (Cvt64to64F ...) => (MOVVD ...) (Cvt32Fto32 ...) => (TRUNCFW ...) (Cvt64Fto32 ...) => (TRUNCDW ...) (Cvt32Fto64 ...) => (TRUNCFV ...) (Cvt64Fto64 ...) => (TRUNCDV ...)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jul 31 03:59:48 UTC 2023 - 41.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM.rules
(Slicemask <t> x) => (SRAconst (RSBconst <t> [0] x) [31]) // float <-> int conversion (Cvt32to32F ...) => (MOVWF ...) (Cvt32to64F ...) => (MOVWD ...) (Cvt32Uto32F ...) => (MOVWUF ...) (Cvt32Uto64F ...) => (MOVWUD ...) (Cvt32Fto32 ...) => (MOVFW ...) (Cvt64Fto32 ...) => (MOVDW ...) (Cvt32Fto32U ...) => (MOVFWU ...) (Cvt64Fto32U ...) => (MOVDWU ...)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 90.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
}, clobbers: 2147483648, // F15 outputs: []outputInfo{ {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 }, }, }, { name: "MOVWD", argLen: 1, asm: arm.AMOVWD, reg: regInfo{ inputs: []inputInfo{ {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 }, clobbers: 2147483648, // F15
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0)