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Results 1 - 10 of 11 for secconst (0.22 sec)
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pilot/pkg/networking/core/listener.go
"istio.io/istio/pkg/config/constants" "istio.io/istio/pkg/config/host" "istio.io/istio/pkg/config/protocol" "istio.io/istio/pkg/log" "istio.io/istio/pkg/monitoring" "istio.io/istio/pkg/proto" secconst "istio.io/istio/pkg/security" "istio.io/istio/pkg/slices" netutil "istio.io/istio/pkg/util/net" "istio.io/istio/pkg/util/sets" "istio.io/istio/pkg/wellknown" ) const ( NoConflict = iota
Registered: Fri Jun 14 15:00:06 UTC 2024 - Last Modified: Mon May 06 04:44:06 UTC 2024 - 55.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM.rules
(ADDconst [c] (SUBconst [d] x)) => (ADDconst [c-d] x) (ADDconst [c] (RSBconst [d] x)) => (RSBconst [c+d] x) (ADCconst [c] (ADDconst [d] x) flags) => (ADCconst [c+d] x flags) (ADCconst [c] (SUBconst [d] x) flags) => (ADCconst [c-d] x flags) (SUBconst [c] (MOVWconst [d])) => (MOVWconst [d-c]) (SUBconst [c] (SUBconst [d] x)) => (ADDconst [-c-d] x) (SUBconst [c] (ADDconst [d] x)) => (ADDconst [-c+d] x)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 90.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/S390X.rules
// Match (x >> c) << d to 'rotate then insert selected bits [into zero]'. (SLDconst (SRDconst x [c]) [d]) => (RISBGZ x {s390x.NewRotateParams(uint8(max8(0, int8(c-d))), 63-d, uint8(int8(d-c)&63))}) // Match (x << c) >> d to 'rotate then insert selected bits [into zero]'. (SRDconst (SLDconst x [c]) [d]) => (RISBGZ x {s390x.NewRotateParams(d, uint8(min8(63, int8(63-c+d))), uint8(int8(c-d)&63))})
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 12 18:09:26 UTC 2023 - 74.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64.rules
(MOVBZreg (SRDconst [c] x)) && c>=56 => (SRDconst [c] x) (MOVBreg (SRDconst [c] x)) && c>56 => (SRDconst [c] x) (MOVBreg (SRDconst [c] x)) && c==56 => (SRADconst [c] x) (MOVBreg (SRADconst [c] x)) && c>=56 => (SRADconst [c] x) (MOVBZreg (SRWconst [c] x)) && c>=24 => (SRWconst [c] x) (MOVBreg (SRWconst [c] x)) && c>24 => (SRWconst [c] x) (MOVBreg (SRWconst [c] x)) && c==24 => (SRAWconst [c] x)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 53.2K bytes - Viewed (0) -
src/go/types/expr.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 29 02:09:54 UTC 2024 - 49.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/S390XOps.go
{name: "SLW", argLength: 2, reg: sh21, asm: "SLW"}, // arg0 << arg1, shift amount is mod 64 {name: "SLDconst", argLength: 1, reg: gp11, asm: "SLD", aux: "UInt8"}, // arg0 << auxint, shift amount 0-63 {name: "SLWconst", argLength: 1, reg: gp11, asm: "SLW", aux: "UInt8"}, // arg0 << auxint, shift amount 0-31
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 24 00:21:13 UTC 2023 - 52.5K bytes - Viewed (0) -
src/cmd/compile/internal/types2/expr.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 29 02:09:54 UTC 2024 - 51.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64Ops.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 58.8K bytes - Viewed (0) -
src/cmd/cgo/gcc.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 20 15:50:06 UTC 2024 - 97K bytes - Viewed (0) -
src/cmd/compile/internal/ppc64/ssa.go
p.AddRestSourceReg(ppc64.REG_R0) } // AuxInt values 4,5,6 implemented with reverse operand order from 0,1,2 if v.AuxInt > 3 { p.Reg, p.GetFrom3().Reg = p.GetFrom3().Reg, p.Reg } p.From.SetConst(v.AuxInt & 3) case ssa.OpPPC64SETBC, ssa.OpPPC64SETBCR: p := s.Prog(v.Op.Asm()) p.To.Type = obj.TYPE_REG p.To.Reg = v.Reg() p.From.Type = obj.TYPE_REG
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 55.4K bytes - Viewed (0)