- Sort Score
- Result 10 results
- Languages All
Results 1 - 6 of 6 for R12 (0.08 sec)
-
src/cmd/asm/internal/asm/testdata/mips64.s
// LMOVH rreg ',' addr // { // outcode(int($1), &$2, 0, &$4); // } MOVH R13, (R7) // a4ed0000 MOVH R10, 61(R23) // a6ea003d MOVH R8, -33(R12) // a588ffdf MOVHU R13, (R7) // a4ed0000 MOVHU R10, 61(R23) // a6ea003d MOVHU R8, -33(R12) // a588ffdf // LMOVB rreg ',' addr // { // outcode(int($1), &$2, 0, &$4); // } MOVB R1, foo<>+3(SB) MOVB R5, -18(R4) // a085ffee
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Tue Aug 08 12:17:12 UTC 2023 - 12.4K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/loong64enc1.s
AMORW R14, (R13), R12 // ac396338 AMORV R14, (R13), R12 // acb96338 AMXORW R14, (R13), R12 // ac396438 AMXORV R14, (R13), R12 // acb96438 AMMAXW R14, (R13), R12 // ac396538 AMMAXV R14, (R13), R12 // acb96538 AMMINW R14, (R13), R12 // ac396638 AMMINV R14, (R13), R12 // acb96638 AMMAXWU R14, (R13), R12 // ac396738 AMMAXVU R14, (R13), R12 // acb96738 AMMINWU R14, (R13), R12 // ac396838
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Sat Nov 02 01:36:19 UTC 2024 - 11.6K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64enc.s
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Mon Jul 24 01:11:41 UTC 2023 - 43.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/operand_test.go
{"AL", "AL"}, {"AX", "AX"}, {"BP", "BP"}, {"BX", "BX"}, {"CX", "CX"}, {"DI", "DI"}, {"DX", "DX"}, {"R10", "R10"}, {"R10", "R10"}, {"R11", "R11"}, {"R12", "R12"}, {"R13", "R13"}, {"R14", "R14"}, {"R15", "R15"}, {"R8", "R8"}, {"R9", "R9"}, {"g", "R14"}, {"SI", "SI"}, {"SP", "SP"}, {"X0", "X0"}, {"X1", "X1"}, {"X10", "X10"},
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Tue Aug 29 18:31:05 UTC 2023 - 23.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/s390x.s
LAAG R4, R5, -524288(R6) // eb54600080e8 LAAL R7, R8, 8192(R9) // eb87900002fa LAALG R10, R11, -8192(R12) // ebbac000feea LAN R1, R2, (R3) // eb21300000f4 LANG R4, R5, (R6) // eb54600000e4 LAX R7, R8, (R9) // eb87900000f7 LAXG R10, R11, (R12) // ebbac00000e7 LAO R1, R2, (R3) // eb21300000f6 LAOG R4, R5, (R6) // eb54600000e6
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Wed Sep 18 15:49:24 UTC 2024 - 22.1K bytes - Viewed (0) -
doc/asm.html
<code>>></code> (logical right shift), and <code>@></code> (rotate right). </li> <li> <code>[R0,g,R12-R15]</code>: For multi-register instructions, the set comprising <code>R0</code>, <code>g</code>, and <code>R12</code> through <code>R15</code> inclusive. </li> <li> <code>(R5, R6)</code>: Destination register pair. </li> </ul>
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Tue Nov 28 19:15:27 UTC 2023 - 36.3K bytes - Viewed (0)