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Results 1 - 10 of 26 for Instructions (0.05 sec)

  1. src/cmd/asm/internal/arch/arch.go

    	instructions["JZ"] = x86.AJEQ   /* alternate */
    	instructions["MASKMOVDQU"] = x86.AMASKMOVOU
    	instructions["MOVD"] = x86.AMOVQ
    	instructions["MOVDQ2Q"] = x86.AMOVQ
    	instructions["MOVNTDQ"] = x86.AMOVNTO
    	instructions["MOVOA"] = x86.AMOVO
    	instructions["PSLLDQ"] = x86.APSLLO
    	instructions["PSRLDQ"] = x86.APSRLO
    	instructions["PADDD"] = x86.APADDL
    	// Spellings originally used in CL 97235.
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Thu Nov 07 02:20:14 UTC 2024
    - 21.7K bytes
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  2. src/cmd/asm/internal/asm/testdata/loong64enc1.s

    	MOVV		(R14)(R13), R12	// cc350c38
    
    	// STX.{B,H,W,D} instructions
    	MOVB		R12, (R14)(R13)	// cc351038
    	MOVH		R12, (R14)(R13)	// cc351438
    	MOVW		R12, (R14)(R13)	// cc351838
    	MOVV		R12, (R14)(R13)	// cc351c38
    
    	// FLDX.{S,D} instructions
    	MOVF		(R14)(R13), F2	// c2353038
    	MOVD		(R14)(R13), F2	// c2353438
    
    	// FSTX.{S,D} instructions
    	MOVF		F2, (R14)(R13)	// c2353838
    	MOVD		F2, (R14)(R13)	// c2353c38
    
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Thu Sep 04 19:24:25 UTC 2025
    - 35.5K bytes
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  3. src/cmd/asm/internal/arch/arm64.go

    // one of the comparison instructions that require special handling.
    func IsARM64ADR(op obj.As) bool {
    	switch op {
    	case arm64.AADR, arm64.AADRP:
    		return true
    	}
    	return false
    }
    
    // IsARM64CMP reports whether the op (as defined by an arm64.A* constant) is
    // one of the comparison instructions that require special handling.
    func IsARM64CMP(op obj.As) bool {
    	switch op {
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Fri Feb 14 15:13:11 UTC 2025
    - 10.3K bytes
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  4. doc/asm.html

    Function is the outermost frame of the call stack. Traceback should stop at this function.
    </li>
    </ul>
    
    <h3 id="special-instructions">Special instructions</h3>
    
    <p>
    The <code>PCALIGN</code> pseudo-instruction is used to indicate that the next instruction should be aligned
    to a specified boundary by padding with no-op instructions.
    </p>
    
    <p>
    It is currently supported on arm64, amd64, ppc64, loong64 and riscv64.
    
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Tue Nov 28 19:15:27 UTC 2023
    - 36.3K bytes
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  5. src/cmd/asm/internal/asm/asm.go

    			}
    		} else if p.arch.Family == sys.Loong64 {
    			if arch.IsLoong64RDTIME(op) {
    				// The Loong64 RDTIME family of instructions is a bit special,
    				// in that both its register operands are outputs
    				prog.To = a[0]
    				if a[1].Type != obj.TYPE_REG {
    					p.errorf("invalid addressing modes for 2nd operand to %s instruction, must be register", op)
    					return
    				}
    				prog.RegTo2 = a[1].Reg
    				break
    			}
    
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Tue Aug 05 17:31:25 UTC 2025
    - 26.2K bytes
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  6. docs/en/docs/management-tasks.md

    Here are the general instructions for the tasks you can perform.
    
    Thanks a lot for your help. 🙇
    
    ## Be Nice
    
    First of all, be nice. 😊
    
    You probably are super nice if you were added to the team, but it's worth mentioning it. 🤓
    
    ### When Things are Difficult
    
    When things are great, everything is easier, so that doesn't need much instructions. But when things are difficult, here are some guidelines.
    
    Registered: Sun Sep 07 07:19:17 UTC 2025
    - Last Modified: Sat Nov 09 16:39:20 UTC 2024
    - 14.2K bytes
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  7. src/cmd/asm/internal/asm/testdata/mips64.s

    //	LMOVW mreg ',' rreg
    //	{
    //		outcode(int($1), &$2, 0, &$4);
    //	}
    	MOVW	M1, R1 // 40010800
    	MOVV	M1, R1 // 40210800
    
    
    //
    // integer operations
    // logical instructions
    // shift instructions
    // unary instructions
    //
    //	LADDW rreg ',' sreg ',' rreg
    //	{
    //		outcode(int($1), &$2, int($4), &$6);
    //	}
    	ADD	R5, R9, R10	// 01255020
    	ADDU	R13, R14, R19	// 01cd9821
    Registered: Tue Sep 09 11:13:09 UTC 2025
    - Last Modified: Tue Aug 08 12:17:12 UTC 2023
    - 12.4K bytes
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  8. pom.xml

    			</plugin>
    			<plugin>
    				<groupId>org.apache.felix</groupId>
    				<artifactId>maven-bundle-plugin</artifactId>
    				<version>6.0.0</version>
    				<extensions>true</extensions>
    
    				<configuration>
    					<instructions>
    						<Bundle-Version>${osgi.version}</Bundle-Version>
    						<Bundle-License>LGPL</Bundle-License>
    						<Bundle-Vendor>CodeLibs</Bundle-Vendor>
    						<Bundle-SymbolicName>org.codelibs.jcifs</Bundle-SymbolicName>
    Registered: Sun Sep 07 00:10:21 UTC 2025
    - Last Modified: Mon Aug 25 14:34:10 UTC 2025
    - 12.1K bytes
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  9. docs/en/docs/contributing.md

    ### Virtual environment
    
    Follow the instructions to create and activate a [virtual environment](virtual-environments.md){.internal-link target=_blank} for the internal code of `fastapi`.
    
    ### Install requirements using pip
    
    Registered: Sun Sep 07 07:19:17 UTC 2025
    - Last Modified: Sat Jul 26 11:35:42 UTC 2025
    - 14.9K bytes
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  10. guava/src/com/google/common/hash/LittleEndianByteArray.java

          }
        };
    
        @Override
        public boolean usesFastPath() {
          return true;
        }
    
        // Provides load and store operations that use native instructions to get better performance.
        private static final Unsafe theUnsafe;
    
        // The offset to the first element in a byte array.
        private static final int BYTE_ARRAY_BASE_OFFSET;
    
        /**
    Registered: Fri Sep 05 12:43:10 UTC 2025
    - Last Modified: Wed Feb 12 03:49:18 UTC 2025
    - 12.3K bytes
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