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Results 1 - 10 of 10 for XORL (0.12 sec)
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src/crypto/sha256/sha256block_amd64.s
MOVL AX, CX; \ RORL $17, AX; \ MOVL CX, DX; \ RORL $19, CX; \ SHRL $10, DX; \ MOVL ((index-15)*4)(BP), BX; \ XORL CX, AX; \ MOVL BX, CX; \ XORL DX, AX; \ RORL $7, BX; \ MOVL CX, DX; \ SHRL $3, DX; \ RORL $18, CX; \ ADDL ((index-7)*4)(BP), AX; \ XORL CX, BX; \ XORL DX, BX; \ ADDL ((index-16)*4)(BP), BX; \ ADDL BX, AX; \ MOVL AX, ((index)*4)(BP)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 47.3K bytes - Viewed (0) -
src/runtime/sys_darwin_amd64.s
MOVL 16(BX), DX // arg 3 prot MOVL 20(BX), CX // arg 4 flags MOVL 24(BX), R8 // arg 5 fid MOVL 28(BX), R9 // arg 6 offset CALL libc_mmap(SB) XORL DX, DX CMPQ AX, $-1 JNE ok CALL libc_error(SB) MOVLQSX (AX), DX // errno XORL AX, AX ok: MOVQ AX, 32(BX) MOVQ DX, 40(BX) RET TEXT runtime·munmap_trampoline(SB),NOSPLIT,$0 MOVQ 8(DI), SI // arg 2 len
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Aug 03 16:07:59 UTC 2023 - 19.7K bytes - Viewed (0) -
src/runtime/sys_openbsd_amd64.s
noerr: RET TEXT runtime·fcntl_trampoline(SB),NOSPLIT,$0 MOVQ DI, BX MOVL 0(BX), DI // arg 1 fd MOVL 4(BX), SI // arg 2 cmd MOVL 8(BX), DX // arg 3 arg XORL AX, AX // vararg: say "no float args" CALL libc_fcntl(SB) XORL DX, DX CMPL AX, $-1 JNE noerr CALL libc_errno(SB) MOVL (AX), DX MOVL $-1, AX noerr: MOVL AX, 12(BX) MOVL DX, 16(BX) RET
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Jun 06 18:49:01 UTC 2023 - 15.5K bytes - Viewed (0) -
src/cmd/internal/notsha256/sha256block_amd64.s
MOVL AX, CX; \ RORL $17, AX; \ MOVL CX, DX; \ RORL $19, CX; \ SHRL $10, DX; \ MOVL ((index-15)*4)(BP), BX; \ XORL CX, AX; \ MOVL BX, CX; \ XORL DX, AX; \ RORL $7, BX; \ MOVL CX, DX; \ SHRL $3, DX; \ RORL $18, CX; \ ADDL ((index-7)*4)(BP), AX; \ XORL CX, BX; \ XORL DX, BX; \ ADDL ((index-16)*4)(BP), BX; \ ADDL BX, AX; \ MOVL AX, ((index)*4)(BP)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:27 UTC 2023 - 14K bytes - Viewed (0) -
src/crypto/sha1/sha1block_amd64.s
MOVL (((index)&0xf)*4)(SP), R10; \ XORL (((index-3)&0xf)*4)(SP), R10; \ XORL (((index-8)&0xf)*4)(SP), R10; \ XORL (((index-14)&0xf)*4)(SP), R10; \ ROLL $1, R10; \ MOVL R10, (((index)&0xf)*4)(SP) #define FUNC1(a, b, c, d, e) \ MOVL d, R9; \ XORL c, R9; \ ANDL b, R9; \ XORL d, R9 #define FUNC2(a, b, c, d, e) \ MOVL b, R9; \ XORL c, R9; \ XORL d, R9 #define FUNC3(a, b, c, d, e) \
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 31.5K bytes - Viewed (0) -
test/codegen/memops.go
s &= x[i+4] // 386: `ORL\t20\([A-Z]+\)\([A-Z]+\*4\), [A-Z]+` // amd64: `ORL\t20\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*4\), [A-Z]+[0-9]*` s |= x[i+5] // 386: `XORL\t24\([A-Z]+\)\([A-Z]+\*4\), [A-Z]+` // amd64: `XORL\t24\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*4\), [A-Z]+[0-9]*` s ^= x[i+6] return s } func idxLoadPlusOp64(x []int64, i int) int64 { s := x[0]
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Aug 04 16:40:24 UTC 2023 - 12.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/386Ops.go
{name: "ORLconst", argLength: 1, reg: gp11, asm: "ORL", aux: "Int32", resultInArg0: true, clobberFlags: true}, // arg0 | auxint {name: "XORL", argLength: 2, reg: gp21, asm: "XORL", commutative: true, resultInArg0: true, clobberFlags: true}, // arg0 ^ arg1 {name: "XORLconst", argLength: 1, reg: gp11, asm: "XORL", aux: "Int32", resultInArg0: true, clobberFlags: true}, // arg0 ^ auxint
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 14 08:10:32 UTC 2023 - 45.1K bytes - Viewed (0) -
src/cmd/internal/obj/x86/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 11 18:32:50 UTC 2023 - 19.1K bytes - Viewed (0) -
src/crypto/aes/gcm_amd64.s
#define ptx SI #define ks AX #define tPtr R8 #define ptxLen R9 #define aluCTR R10 #define aluTMP R11 #define aluK R12 #define NR R13 #define increment(i) ADDL $1, aluCTR; MOVL aluCTR, aluTMP; XORL aluK, aluTMP; BSWAPL aluTMP; MOVL aluTMP, (3*4 + 8*16 + i*16)(SP) #define aesRnd(k) AESENC k, B0; AESENC k, B1; AESENC k, B2; AESENC k, B3; AESENC k, B4; AESENC k, B5; AESENC k, B6; AESENC k, B7
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 23.4K bytes - Viewed (0) -
src/runtime/asm_386.s
MOVL SP, (g_stack+stack_hi)(BP) // find out information about the processor we're on // first see if CPUID instruction is supported. PUSHFL PUSHFL XORL $(1<<21), 0(SP) // flip ID bit POPFL PUSHFL POPL AX XORL 0(SP), AX POPFL // restore EFLAGS TESTL $(1<<21), AX JNE has_cpuid bad_proc: // show that the program requires MMX. MOVL $2, 0(SP) MOVL $bad_proc_msg<>(SB), 4(SP)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Mar 15 15:45:13 UTC 2024 - 43.1K bytes - Viewed (0)