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Results 1 - 5 of 5 for FABSD (0.03 sec)

  1. src/math/floor_riscv64.s

    	MOVD	x+0(FP), F0; 	\
    	/* whether x is NaN */; \
    	FEQD	F0, F0, X6;	\
    	BNEZ	X6, 3(PC);	\
    	/* return NaN if x is NaN */; \
    	MOVD	F0, ret+8(FP); 	\
    	RET;			\
    	MOV	$PosInf, X6;	\
    	FMVDX	X6, F1;		\
    	FABSD	F0, F2;		\
    	/* if abs(x) > +Inf, return Inf instead of round(x) */; \
    	FLTD	F1, F2, X6;	\
    	/* Inf should keep same signed with x then return */;	\
    	BEQZ	X6, 3(PC); \
    	FCVTLD.MODE	F0, X6;	\
    	FCVTDL	X6, F1;		\
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Feb 23 08:34:12 UTC 2024
    - 1K bytes
    - Viewed (0)
  2. src/cmd/internal/obj/riscv/anames.go

    	"BEXT",
    	"BEXTI",
    	"BINV",
    	"BINVI",
    	"BSET",
    	"BSETI",
    	"WORD",
    	"BEQZ",
    	"BGEZ",
    	"BGT",
    	"BGTU",
    	"BGTZ",
    	"BLE",
    	"BLEU",
    	"BLEZ",
    	"BLTZ",
    	"BNEZ",
    	"FABSD",
    	"FABSS",
    	"FNEGD",
    	"FNEGS",
    	"FNED",
    	"FNES",
    	"MOV",
    	"MOVB",
    	"MOVBU",
    	"MOVF",
    	"MOVD",
    	"MOVH",
    	"MOVHU",
    	"MOVW",
    	"MOVWU",
    	"NEG",
    	"NEGW",
    	"NOT",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Mar 20 14:19:33 UTC 2024
    - 2.9K bytes
    - Viewed (0)
  3. test/codegen/math.go

    	return float32(math.Sqrt(float64(x)))
    }
    
    // Check that it's using integer registers
    func abs(x, y float64) {
    	// amd64:"BTRQ\t[$]63"
    	// arm64:"FABSD\t"
    	// s390x:"LPDFR\t",-"MOVD\t"     (no integer load/store)
    	// ppc64x:"FABS\t"
    	// riscv64:"FABSD\t"
    	// wasm:"F64Abs"
    	// arm/6:"ABSD\t"
    	// mips64/hardfloat:"ABSD\t"
    	// mips/hardfloat:"ABSD\t"
    	sink64[0] = math.Abs(x)
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Apr 04 15:24:29 UTC 2024
    - 6.2K bytes
    - Viewed (0)
  4. src/cmd/internal/obj/arm64/anames.go

    	"CSNEG",
    	"CSNEGW",
    	"DC",
    	"DCPS1",
    	"DCPS2",
    	"DCPS3",
    	"DMB",
    	"DRPS",
    	"DSB",
    	"DWORD",
    	"EON",
    	"EONW",
    	"EOR",
    	"EORW",
    	"ERET",
    	"EXTR",
    	"EXTRW",
    	"FABSD",
    	"FABSS",
    	"FADDD",
    	"FADDS",
    	"FCCMPD",
    	"FCCMPED",
    	"FCCMPES",
    	"FCCMPS",
    	"FCMPD",
    	"FCMPED",
    	"FCMPES",
    	"FCMPS",
    	"FCSELD",
    	"FCSELS",
    	"FCVTDH",
    	"FCVTDS",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 18 01:40:37 UTC 2023
    - 5.4K bytes
    - Viewed (0)
  5. src/math/exp_arm64.s

    	FMOVD	$Overflow, F1
    	FCMPD	F1, F0
    	BGT	overflow	// x > Overflow, return PosInf
    	FMOVD	$Underflow, F1
    	FCMPD	F1, F0
    	BLT	underflow	// x < Underflow, return 0
    	MOVD	$NearZero, R0
    	FMOVD	R0, F2
    	FABSD	F0, F3
    	FMOVD	$1.0, F1	// F1 = 1.0
    	FCMPD	F2, F3
    	BLT	nearzero	// fabs(x) < NearZero, return 1 + x
    	// argument reduction, x = k*ln2 + r,  |r| <= 0.5*ln2
    	// computed as r = hi - lo for extra precision.
    	FMOVD	$Log2e, F2
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Apr 15 15:48:19 UTC 2021
    - 5.4K bytes
    - Viewed (0)
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