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Results 1 - 3 of 3 for SP (0.19 sec)
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src/cmd/asm/internal/asm/testdata/riscv64error.s
MOV $8(SP), (X5) // ERROR "address load must target register" MOVB $8(SP), X5 // ERROR "unsupported address load" MOVH $8(SP), X5 // ERROR "unsupported address load" MOVW $8(SP), X5 // ERROR "unsupported address load" MOVF $8(SP), X5 // ERROR "unsupported address load" MOV $1234, 0(SP) // ERROR "constant load must target register" MOV $1234, 8(SP) // ERROR "constant load must target register"
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Sun Apr 07 03:32:27 GMT 2024 - 2.8K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/386enc.s
TEXT asmtest(SB),DUPOK|NOSPLIT,$0 // Instructions that were encoded with BYTE sequences. // Included to simplify validation of CL that fixed that. MOVQ (AX), M0 // 0f6f00 MOVQ M0, 8(SP) // 0f7f442408 MOVQ 8(SP), M0 // 0f6f442408 MOVQ M0, (AX) // 0f7f00 MOVQ M0, (BX) // 0f7f03 // On non-64bit arch, Go asm allowed uint32 offsets instead of int32. // These tests check that property for backwards-compatibility.
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Tue Apr 11 18:32:50 GMT 2023 - 1.2K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64error.s
// Use of this source code is governed by a BSD-style // license that can be found in the LICENSE file. TEXT errors(SB),$0 MOVL foo<>(SB)(AX), AX // ERROR "invalid instruction" MOVL (AX)(SP*1), AX // ERROR "invalid instruction" EXTRACTPS $4, X2, (BX) // ERROR "invalid instruction" EXTRACTPS $-1, X2, (BX) // ERROR "invalid instruction" // VSIB addressing does not permit non-vector (X/Y)
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Wed Jun 14 00:03:57 GMT 2023 - 8.9K bytes - Viewed (0)