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Results 1 - 10 of 11 for ANDCC (0.06 sec)
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src/runtime/memclr_ppc64x.s
check: ANDCC $7, R4, R5 // R5: leftover bytes to clear SRD $3, R4, R6 // R6: double words to clear CMP R6, $0, CR1 // CR1[EQ] set if no double words BC 12, 6, nozerolarge // only single bytes CMP R4, $512 BLT under512 // special case for < 512 ANDCC $127, R3, R8 // check for 128 alignment of address BEQ zero512setup ANDCC $7, R3, R15
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue May 16 17:08:59 UTC 2023 - 4.4K bytes - Viewed (0) -
src/internal/bytealg/count_ppc64x.s
VADDUDM V2, V5, V5 // The count will be fixed up afterwards. ADD $32, R3 BDNZ cmploop VADDUDM V4, V5, V5 MFVSRD V5, R18 VSLDOI $8, V5, V5, V5 MFVSRD V5, R21 ADD R21, R18, R18 ANDCC $31, R4, R4 // Skip the tail processing if no bytes remaining. BEQ tail_0 #ifdef GOPPC64_power10 SRD $3, R18, R18 // Fix the vector loop count before counting the tail on P10. tail: // Count the last 0 - 31 bytes.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Aug 14 20:30:44 UTC 2023 - 3.6K bytes - Viewed (0) -
test/codegen/noextend.go
// Truncate not needed, load does sign/zero extend // ppc64x:-"MOVBZ\tR\\d+,\\sR\\d+" val16[0] = uint16(*u8) // AND not needed due to size // ppc64x:-"ANDCC" sval16[1] = 255 & int16(x8+y8) // ppc64x:-"ANDCC" val16[1] = 255 & uint16(*u8+z8) } func shiftidx(u8 *uint8, x16 *int16, u16 *uint16) { // ppc64x:-"MOVBZ\tR\\d+,\\sR\\d+" val16[0] = uint16(sval16[*u8>>2])
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Dec 14 17:22:18 UTC 2023 - 5.4K bytes - Viewed (0) -
src/internal/bytealg/compare_ppc64x.s
RET PCALIGN $16 cmp4: // 4 - 7B CMP R9,$4 BLT cmp2 ANDCC $3,R9,R9 _LWBEX (R0)(R5),R10 _LWBEX (R0)(R6),R11 _LWBEX (R9)(R5),R12 _LWBEX (R9)(R6),R14 RLDIMI $32,R10,$0,R12 RLDIMI $32,R11,$0,R14 CMPU R12,R14 BR cmp0 PCALIGN $16 cmp2: // 2 - 3B CMP R9,$2 BLT cmp1 ANDCC $1,R9,R9 _LHBEX (R0)(R5),R10 _LHBEX (R0)(R6),R11 _LHBEX (R9)(R5),R12
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Aug 28 17:33:20 UTC 2023 - 6.7K bytes - Viewed (0) -
src/runtime/memmove_ppc64x.s
check: #ifdef GOPPC64_power10 CMP LEN, $16 BGT mcopy SLD $56, LEN, TMP LXVL SRC, TMP, V0 STXVL V0, TGT, TMP RET #endif mcopy: ANDCC $7, LEN, BYTES // R7: bytes to copy SRD $3, LEN, DWORDS // R6: double words to copy MOVFL CR0, CR3 // save CR from ANDCC CMP DWORDS, $0, CR1 // CR1[EQ] set if no double words to copy // Determine overlap by subtracting dest - src and comparing against the
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 16:47:45 UTC 2023 - 4.9K bytes - Viewed (0) -
test/codegen/bits.go
func signextendAndMask8to64(a int8) (s, z uint64) { // ppc64x: "MOVB", "ANDCC\t[$]1015," s = uint64(a) & 0x3F7 // ppc64x: -"MOVB", "ANDCC\t[$]247," z = uint64(uint8(a)) & 0x3F7 return } // Verify zero-extended values are not sign-extended under a bit mask (#61297) func zeroextendAndMask8to64(a int8, b int16) (x, y uint64) { // ppc64x: -"MOVB\t", -"ANDCC", "MOVBZ" x = uint64(a) & 0xFF
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jun 07 19:02:52 UTC 2024 - 7.8K bytes - Viewed (0) -
src/internal/bytealg/equal_ppc64x.s
// extra bytes from the higher addresses. And align those values // consistently in register as either address may have differing // alignment requirements. ANDCC $PAGE_OFFSET, R8, R6 // &sX & PAGE_OFFSET ANDCC $PAGE_OFFSET, R4, R9 SUBC R5, $8, R12 // 8-len SLD $3, R12, R14 // (8-len)*8 CMPU R6, R12, CR1 // Enough bytes lower in the page to load lower? CMPU R9, R12, CR0
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 16:47:45 UTC 2023 - 4.9K bytes - Viewed (0) -
src/internal/bytealg/indexbyte_ppc64x.s
BLT cmp1 _LHBEX (R0)(R3),R10 CMPB R10,R5,R10 SLDCC $48,R10,R10 CNTLZD R10,R10 SRD $3,R10,R3 BNE found cmp1: // Length 1 MOVD $-1,R3 ANDCC $1,R4,R31 BEQ found MOVBZ -1(R9),R10 CMPB R10,R5,R10 ANDCC $1,R10 ADD $-1,R4 ISEL CR0EQ,R3,R4,R3 found: RET #endif notfound: MOVD $-1,R3
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 16:10:29 UTC 2023 - 6.3K bytes - Viewed (0) -
src/crypto/subtle/xor_ppc64x.s
BLE CR6, small // <= 8 BLT CR7, xor32 // Case for 32 ≤ n < 64 bytes // Case for n ≥ 64 bytes preloop64: SRD $6, R6, R7 // Set up loop counter MOVD R7, CTR MOVD $16, R10 MOVD $32, R14 MOVD $48, R15 ANDCC $63, R6, R9 // Check for tailing bytes for later PCALIGN $16 // Case for >= 64 bytes // Process 64 bytes per iteration // Load 4 vectors of a and b // XOR the corresponding vectors
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 18:17:17 UTC 2024 - 2.9K bytes - Viewed (0) -
test/codegen/bool.go
// ppc64x/power8:"FCMP","ISEL",-"SETBC\tCR0LT" b := !(x >= y) return b } func TestLogicalCompareZero(x *[64]uint64) { // ppc64x:"ANDCC",^"AND" b := x[0]&3 if b!=0 { x[0] = b } // ppc64x:"ANDCC",^"AND" b = x[1]&x[2] if b!=0 { x[1] = b } // ppc64x:"ANDNCC",^"ANDN" b = x[1]&^x[2] if b!=0 { x[1] = b } // ppc64x:"ORCC",^"OR"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 13 22:12:32 UTC 2023 - 6.7K bytes - Viewed (0)