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Results 1 - 10 of 88 for movbe (0.03 sec)

  1. src/cmd/asm/internal/asm/testdata/loong64enc1.s

    	MOVWU	R4, result+16(FP)	// 64608029
    	MOVV	R4, result+16(FP)	// 6460c029
    	MOVB	R4, result+16(FP)	// 64600029
    	MOVBU	R4, result+16(FP)	// 64600029
    	MOVWL	R4, result+16(FP)	// 6460002f
    	MOVVL	R4, result+16(FP)	// 6460802f
    	MOVW	R4, 1(R5)		// a4048029
    	MOVWU	R4, 1(R5)		// a4048029
    	MOVV	R4, 1(R5)		// a404c029
    	MOVB	R4, 1(R5)		// a4040029
    	MOVBU	R4, 1(R5)		// a4040029
    	MOVWL	R4, 1(R5)		// a404002f
    	MOVVL	R4, 1(R5)		// a404802f
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 02:04:54 UTC 2024
    - 8.2K bytes
    - Viewed (0)
  2. src/internal/runtime/atomic/atomic_mips64x.s

    	RET
    
    TEXT ·Store8(SB), NOSPLIT, $0-9
    	MOVV	ptr+0(FP), R1
    	MOVB	val+8(FP), R2
    	SYNC
    	MOVB	R2, 0(R1)
    	SYNC
    	RET
    
    TEXT ·Store64(SB), NOSPLIT, $0-16
    	MOVV	ptr+0(FP), R1
    	MOVV	val+8(FP), R2
    	SYNC
    	MOVV	R2, 0(R1)
    	SYNC
    	RET
    
    // void	Or8(byte volatile*, byte);
    TEXT ·Or8(SB), NOSPLIT, $0-9
    	MOVV	ptr+0(FP), R1
    	MOVBU	val+8(FP), R2
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat May 11 21:29:34 UTC 2024
    - 7.2K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/riscv64error.s

    	MOV	$1234, 8(SP)			// ERROR "constant load must target register"
    	MOVB	$1, X5				// ERROR "unsupported constant load"
    	MOVH	$1, X5				// ERROR "unsupported constant load"
    	MOVW	$1, X5				// ERROR "unsupported constant load"
    	MOVF	$1, X5				// ERROR "unsupported constant load"
    	MOVBU	X5, (X6)			// ERROR "unsupported unsigned store"
    	MOVHU	X5, (X6)			// ERROR "unsupported unsigned store"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sun Apr 07 03:32:27 UTC 2024
    - 2.8K bytes
    - Viewed (0)
  4. src/cmd/internal/obj/loong64/anames.go

    	"LU32ID",
    	"LU52ID",
    	"PCALAU12I",
    	"PCADDU12I",
    	"JIRL",
    	"BGE",
    	"BLT",
    	"BLTU",
    	"BGEU",
    	"DIV",
    	"DIVD",
    	"DIVF",
    	"DIVU",
    	"DIVW",
    	"LL",
    	"LLV",
    	"LUI",
    	"MOVB",
    	"MOVBU",
    	"MOVD",
    	"MOVDF",
    	"MOVDW",
    	"MOVF",
    	"MOVFD",
    	"MOVFW",
    	"MOVH",
    	"MOVHU",
    	"MOVW",
    	"MOVWD",
    	"MOVWF",
    	"MOVWL",
    	"MOVWR",
    	"MUL",
    	"MULD",
    	"MULF",
    	"MULU",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 02:04:54 UTC 2024
    - 1.9K bytes
    - Viewed (0)
  5. src/internal/bytealg/equal_loong64.s

    TEXT runtime·memequal<ABIInternal>(SB),NOSPLIT|NOFRAME,$0-25
    	BEQ	R4, R5, eq
    	ADDV	R4, R6, R7
    	PCALIGN	$16
    loop:
    	BNE	R4, R7, test
    	MOVV	$1, R4
    	RET
    test:
    	MOVBU	(R4), R9
    	ADDV	$1, R4
    	MOVBU	(R5), R10
    	ADDV	$1, R5
    	BEQ	R9, R10, loop
    
    	MOVB    R0, R4
    	RET
    eq:
    	MOVV	$1, R4
    	RET
    
    // memequal_varlen(a, b unsafe.Pointer) bool
    TEXT runtime·memequal_varlen<ABIInternal>(SB),NOSPLIT,$40-17
    	BEQ	R4, R5, eq
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 13 15:04:25 UTC 2024
    - 875 bytes
    - Viewed (0)
  6. test/codegen/bits.go

    func signextendAndMask8to64(a int8) (s, z uint64) {
    	// ppc64x: "MOVB", "ANDCC\t[$]1015,"
    	s = uint64(a) & 0x3F7
    	// ppc64x: -"MOVB", "ANDCC\t[$]247,"
    	z = uint64(uint8(a)) & 0x3F7
    	return
    }
    
    // Verify zero-extended values are not sign-extended under a bit mask (#61297)
    func zeroextendAndMask8to64(a int8, b int16) (x, y uint64) {
    	// ppc64x: -"MOVB\t", -"ANDCC", "MOVBZ"
    	x = uint64(a) & 0xFF
    	// ppc64x: -"MOVH\t", -"ANDCC", "MOVHZ"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Jun 07 19:02:52 UTC 2024
    - 7.8K bytes
    - Viewed (0)
  7. src/internal/runtime/atomic/atomic_mipsx.s

    	SC	R3, (R1)	// *R1 = R3
    	BEQ	R3, try_cas
    	SYNC
    	MOVB	R3, ret+12(FP)
    	RET
    cas_fail:
    	SYNC
    	MOVB	R0, ret+12(FP)
    	RET
    
    TEXT ·Store(SB),NOSPLIT,$0-8
    	MOVW	ptr+0(FP), R1
    	MOVW	val+4(FP), R2
    	SYNC
    	MOVW	R2, 0(R1)
    	SYNC
    	RET
    
    TEXT ·Store8(SB),NOSPLIT,$0-5
    	MOVW	ptr+0(FP), R1
    	MOVB	val+4(FP), R2
    	SYNC
    	MOVB	R2, 0(R1)
    	SYNC
    	RET
    
    TEXT ·Load(SB),NOSPLIT,$0-8
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat May 11 21:29:34 UTC 2024
    - 4.9K bytes
    - Viewed (0)
  8. src/cmd/internal/obj/x86/seh.go

    	}
    
    	// It must be followed by a MOVQ SP, BP.
    	movbp := pushbp.Link
    	if movbp == nil {
    		ctxt.Diag("missing frame pointer instruction: MOVQ SP, BP")
    		return
    	}
    	if !(movbp.As == AMOVQ && movbp.From.Type == obj.TYPE_REG && movbp.From.Reg == REG_SP &&
    		movbp.To.Type == obj.TYPE_REG && movbp.To.Reg == REG_BP && movbp.From.Offset == 0) {
    		ctxt.Diag("unexpected frame pointer instruction\n%v", movbp)
    		return
    	}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 15 14:41:10 UTC 2024
    - 4.6K bytes
    - Viewed (0)
  9. src/internal/bytealg/indexbyte_loong64.s

    	// R6 = b_cap (unused)
    	// R7 = byte to find
    	AND	$0xff, R7
    	MOVV	R4, R6		// store base for later
    	ADDV	R4, R5		// end
    	ADDV	$-1, R4
    
    	PCALIGN	$16
    loop:
    	ADDV	$1, R4
    	BEQ	R4, R5, notfound
    	MOVBU	(R4), R8
    	BNE	R7, R8, loop
    
    	SUBV	R6, R4		// remove base
    	RET
    
    notfound:
    	MOVV	$-1, R4
    	RET
    
    TEXT ·IndexByteString<ABIInternal>(SB),NOSPLIT,$0-32
    	// R4 = s_base
    	// R5 = s_len
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 13 15:04:25 UTC 2024
    - 905 bytes
    - Viewed (0)
  10. src/runtime/memclr_loong64.s

    	// do one byte at a time until 8-aligned
    	AND	$7, R4, R8
    	BEQ	R8, words
    	MOVB	R0, (R4)
    	ADDV	$1, R4
    	JMP	-4(PC)
    
    words:
    	// do 8 bytes at a time if there is room
    	ADDV	$-7, R6, R5
    
    	PCALIGN	$16
    	SGTU	R5, R4, R8
    	BEQ	R8, out
    	MOVV	R0, (R4)
    	ADDV	$8, R4
    	JMP	-4(PC)
    
    out:
    	BEQ	R4, R6, done
    	MOVB	R0, (R4)
    	ADDV	$1, R4
    	JMP	-3(PC)
    done:
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 13 15:04:25 UTC 2024
    - 766 bytes
    - Viewed (0)
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