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Results 1 - 10 of 16 for r3 (0.03 sec)

  1. src/cmd/asm/internal/asm/testdata/arm64.s

    	STP.W	(R3, R4), 8(RSP)    // e39380a9
    	STP.P	(R3, R4), 8(RSP)    // e39380a8
    	STP	(R3, R4), -8(RSP)   // e3933fa9
    	STP	(R3, R4), 11(RSP)   // fb2f0091631300a9
    	STP	(R3, R4), 1024(RSP) // fb031091631300a9
    	STP	(R3, R4), x(SB)
    	STP	(R3, R4), x+8(SB)
    	STPW	(R3, R4), (R5)      // a3100029
    	STPW	(R3, R4), 4(R5)     // a3900029
    	STPW.W	(R3, R4), 4(R5)     // a3908029
    	STPW.P	(R3, R4), 4(R5)     // a3908028
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Jul 24 18:45:14 UTC 2024
    - 95.2K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/s390x.s

    	MOVW	R1, 4095(R2)(R3)       // 50132fff
    	MOVW	R1, 4096(R2)(R3)       // e31320000150
    	MOVWZ	R1, 4095(R2)(R3)       // 50132fff
    	MOVWZ	R1, 4096(R2)(R3)       // e31320000150
    	MOVH	R1, 4095(R2)(R3)       // 40132fff
    	MOVHZ   R1, 4095(R2)(R3)       // 40132fff
    	MOVH	R1, 4096(R2)(R3)       // e31320000170
    	MOVHZ	R1, 4096(R2)(R3)       // e31320000170
    	MOVB	R1, 4095(R2)(R3)       // 42132fff
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Sep 18 15:49:24 UTC 2024
    - 22.1K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/arm64enc.s

    	ADDSW R12.SXTX<<1, R29, R7                 // a7e72c2b
    	ADDS R24.UXTX<<4, R25, R21                 // 357338ab
    	ADDSW $(3525<<12), R3, R11                 // ADDSW $14438400, R3, R11          // 6b147731
    	ADDS $(3525<<12), R3, R11                  // ADDS $14438400, R3, R11           // 6b1477b1
    	ADDSW R7->22, R14, R13                     // cd59872b
    	ADDS R14>>7, ZR, R4                        // e41f4eab
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Mon Jul 24 01:11:41 UTC 2023
    - 43.9K bytes
    - Viewed (0)
  4. src/cmd/asm/internal/asm/testdata/armerror.s

    	BFX.S	$2, $4, R3         // ERROR "invalid .S suffix"
    	BFXU.W	$2, $4, R3, R0     // ERROR "invalid .W suffix"
    	MOVB.S	R1, 4(R2)          // ERROR "invalid .S suffix"
    	MOVHU.S	R1, 4(R2)          // ERROR "invalid .S suffix"
    	MOVW.S	R1, 4(R2)          // ERROR "invalid .S suffix"
    	MOVBU.S	4(R2), R3          // ERROR "invalid .S suffix"
    	MOVH.S	4(R2), R3          // ERROR "invalid .S suffix"
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Oct 23 15:18:14 UTC 2024
    - 14.5K bytes
    - Viewed (0)
  5. src/cmd/asm/internal/asm/testdata/ppc64.s

    	CMPU R3, R0                     // 7c230040
    	CMPU R3, R0, CR2                // CMPU R3,CR2,R0  // 7d230040
    	CMPW R3, R4                     // 7c032000
    	CMPW R3, R0                     // 7c030000
    	CMPW R3, R0, CR3                // CMPW R3,CR3,R0  // 7d830000
    	CMPWU R3, R4                    // 7c032040
    	CMPWU R3, R0                    // 7c030040
    	CMPWU R3, R0, CR4               // CMPWU R3,CR4,R0 // 7e030040
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Oct 29 13:14:38 UTC 2024
    - 51K bytes
    - Viewed (0)
  6. src/cmd/asm/internal/asm/testdata/arm64error.s

    	CINC	CS, R2, R3, R4                                   // ERROR "illegal combination"
    	CSEL	LT, R1, R2                                       // ERROR "illegal combination"
    	CINC	AL, R2, R3                                       // ERROR "invalid condition"
    	CINC	NV, R2, R3                                       // ERROR "invalid condition"
    	CINVW	AL, R2, R3                                       // ERROR "invalid condition"
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Fri Dec 08 03:28:17 UTC 2023
    - 37.8K bytes
    - Viewed (0)
  7. src/cmd/asm/internal/asm/operand_test.go

    	{"R13", "R13"},
    	{"R14", "R14"},
    	{"R15", "R15"},
    	{"R1<<2(R3)", "R1<<2(R3)"},
    	{"R(1)<<2(R(3))", "R1<<2(R3)"},
    	{"R2", "R2"},
    	{"R3", "R3"},
    	{"R4", "R4"},
    	{"R(4)", "R4"},
    	{"R5", "R5"},
    	{"R6", "R6"},
    	{"R7", "R7"},
    	{"R8", "R8"},
    	{"[R0,R1,g,R15]", "[R0,R1,g,R15]"},
    	{"[R0-R7]", "[R0,R1,R2,R3,R4,R5,R6,R7]"},
    	{"[R(0)-R(7)]", "[R0,R1,R2,R3,R4,R5,R6,R7]"},
    	{"[R0]", "[R0]"},
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Aug 29 18:31:05 UTC 2023
    - 23.9K bytes
    - Viewed (0)
  8. src/cmd/asm/internal/asm/testdata/arm.s

    	MOVHU.W	R3, 0x20(R4)         // MOVHU.W R3, 32(R4)        // b032e4e1
    	MOVHU.P	R3, 0x20(R4)         // MOVHU.P R3, 32(R4)        // b032c4e0
    	MOVH	R3, -0x20(R4)        // MOVH R3, -32(R4)          // b03244e1
    	MOVH.W	R3, -0x20(R4)        // MOVH.W R3, -32(R4)        // b03264e1
    	MOVH.P	R3, -0x20(R4)        // MOVH.P R3, -32(R4)        // b03244e0
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Fri Dec 15 20:51:01 UTC 2023
    - 69K bytes
    - Viewed (0)
  9. src/cmd/asm/internal/asm/testdata/ppc64_p10.s

    	VEXTDDVLX V1, V2, R3, V4                // 108110de
    	VEXTDDVRX V1, V2, R3, V4                // 108110df
    	VEXTDUBVLX V1, V2, R3, V4               // 108110d8
    	VEXTDUBVRX V1, V2, R3, V4               // 108110d9
    	VEXTDUHVLX V1, V2, R3, V4               // 108110da
    	VEXTDUHVRX V1, V2, R3, V4               // 108110db
    	VEXTDUWVLX V1, V2, R3, V4               // 108110dc
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Thu Mar 23 20:52:57 UTC 2023
    - 14.3K bytes
    - Viewed (0)
  10. src/cmd/asm/internal/asm/testdata/armv6.s

    	MOVFD	F0, F1        // c01ab7ee
    	MOVDF	F4, F5        // c45bb7ee
    
    	LDREX	(R8), R9      // 9f9f98e1
    	LDREXB	(R11), R12    // 9fcfdbe1
    	LDREXD	(R11), R12    // 9fcfbbe1
    	STREX	R3, (R4), R5  // STREX  (R4), R3, R5 // 935f84e1
    	STREXB	R8, (R9), g   // STREXB (R9), R8, g  // 98afc9e1
    	STREXD	R8, (R9), g   // STREXD (R9), R8, g  // 98afa9e1
    
    	CMPF    F8, F9        // c89ab4ee10faf1ee
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Oct 23 15:18:14 UTC 2024
    - 4.7K bytes
    - Viewed (0)
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