{"[k3-k6]", "register list: bad low register in `[k3`"},
	{"[X0]", "register list: expected '-' after `[X0`, found ']'"},
	{"[X0-]", "register list: bad high register in `[X0-]`"},
	{"[X0-x]", "register list: bad high register in `[X0-x`"},
	{"[X0-X1-X2]", "register list: expected ']' after `[X0-X1`, found '-'"},
	{"[X0,X3]", "register list: expected '-' after `[X0`, found ','"},
	{"[X0,X1,X2,X3]", "register list: expected '-' after `[X0`, found ','"},

	CJR	X0					// ERROR "cannot use register X0 in rs1"
	CJR	X10, X11				// ERROR "expected no register in rs2"
	CJALR	X0					// ERROR "cannot use register X0 in rs1"
	CJALR	X10, X11				// ERROR "expected no register in rd"
	CBEQZ	X5, 1(PC)				// ERROR "expected integer prime register in rs1"
	CBNEZ	X5, 1(PC)				// ERROR "expected integer prime register in rs1"
	CLI	$3, X0					// ERROR "cannot use register X0 in rd"

	VPCLMULQDQ $127, X22, X0, X0                       // 62b37d0844c67f or 62b3fd0844c67f
	VPCLMULQDQ $127, X19, X0, X0                       // 62b37d0844c37f or 62b3fd0844c37f
	VPCLMULQDQ $127, X22, X28, X0                      // 62b31d0044c67f or 62b39d0044c67f
	VPCLMULQDQ $127, X7, X28, X0                       // 62f31d0044c77f or 62f39d0044c77f
	VPCLMULQDQ $127, X19, X28, X0                      // 62b31d0044c37f or 62b39d0044c37f

// LTYPEI spec7	{ outcode(int($1), &$2); }
	IMULL	AX
	IMULL	$4, CX
	IMULL	AX, BX

// LTYPEXC spec9	{ outcode(int($1), &$2); }
	CMPPD	X0, X1, 4
	CMPPD	foo+4(SB), X1, 4

// LTYPEX spec10	{ outcode(int($1), &$2); }
	PINSRD	$1, (AX), X0
	PINSRD	$2, foo+4(FP), X0

// Was bug: LOOP is a branch instruction.
	JCS	2(PC)
loop:
	LOOP	loop // LOOP

// Tests for TLS reference.
	MOVL    (TLS), AX

		// Test AVX512 suffixes.
		{"VADDPD.A X0, X1, X2", `unknown suffix "A"`},
		{"VADDPD.A.A X0, X1, X2", `unknown suffix "A"; duplicate suffix "A"`},
		{"VADDPD.A.A.A X0, X1, X2", `unknown suffix "A"; duplicate suffix "A"`},
		{"VADDPD.A.B X0, X1, X2", `unknown suffix "A"; unknown suffix "B"`},
		{"VADDPD.Z.A X0, X1, X2", `Z suffix should be the last; unknown suffix "A"`},

	// Test low-8 register for /is4 "hr" operand.
	VPBLENDVB X0, (BX), X1, X2              // c4e3714c1300
	// <XMM0>/Yxr0 tests.
	SHA256RNDS2 X0, (BX), X2   // 0f38cb13
	SHA256RNDS2 X0, (R11), X2  // 410f38cb13
	SHA256RNDS2 X0, X2, X2     // 0f38cbd2
	SHA256RNDS2 X0, X11, X2    // 410f38cbd3
	SHA256RNDS2 X0, (BX), X11  // 440f38cb1b
	SHA256RNDS2 X0, (R11), X11 // 450f38cb1b
	SHA256RNDS2 X0, X2, X11    // 440f38cbda

AESENC X0, X1 AESENC X0, X2 AESENC X0, X3 AESENC X0, X4 ADDQ $0x20, CX enc128: MOVUPS (CX), X0 AESENC X0, X1 AESENC X0, X2 AESENC X0, X3 AESENC X0, X4 MOVUPS 16(CX), X0 AESENC X0, X1 AESENC X0, X2 AESENC X0, X3 AESENC X0, X4 MOVUPS 32(CX), X0 AESENC X0, X1 AESENC X0, X2 AESENC X0, X3 AESENC X0, X4 MOVUPS 48(CX), X0 AESENC X0, X1 AESENC X0, X2 AESENC X0, X3 AESENC X0, X4 MOVUPS 64(CX), X0 AESENC X0, X1 AESENC X0, X2 AESENC X0, X3 AESENC X0, X4 MOVUPS 80(CX), X0 AESENC X0, X1 AESENC X0, X2 AESENC X0, X3...

	const size = 12 * 1024 * 1024
	b.Run(" 00|00 ", func(b *testing.B) { benchmarkErasureDecode(2, 2, 0, 0, size, b) })
	b.Run(" 00|X0 ", func(b *testing.B) { benchmarkErasureDecode(2, 2, 0, 1, size, b) })
	b.Run(" X0|00 ", func(b *testing.B) { benchmarkErasureDecode(2, 2, 1, 0, size, b) })
	b.Run(" X0|X0 ", func(b *testing.B) { benchmarkErasureDecode(2, 2, 1, 1, size, b) })
}

func BenchmarkErasureDecode_4_64KB(b *testing.B) {

	VADDSUBPD X20, X1, X2           // ERROR "invalid instruction"
	VADDSUBPS X0, X20, X2           // ERROR "invalid instruction"
	// Use of K0 for write mask (Yknot0).
	// TODO(quasilyte): improve error message (#21860).
	//                  "K0 can't be used for write mask"
	VADDPD X0, X1, K0, X2           // ERROR "invalid instruction"
	VADDPD Y0, Y1, K0, Y2           // ERROR "invalid instruction"

AESENC X0, X1 AESENC X0, X2 AESENC X0, X3 AESENC X0, X4 ADDQ $0x20, CX enc128: MOVUPS (CX), X0 AESENC X0, X1 AESENC X0, X2 AESENC X0, X3 AESENC X0, X4 MOVUPS 16(CX), X0 AESENC X0, X1 AESENC X0, X2 AESENC X0, X3 AESENC X0, X4 MOVUPS 32(CX), X0 AESENC X0, X1 AESENC X0, X2 AESENC X0, X3 AESENC X0, X4 MOVUPS 48(CX), X0 AESENC X0, X1 AESENC X0, X2 AESENC X0, X3 AESENC X0, X4 MOVUPS 64(CX), X0 AESENC X0, X1 AESENC X0, X2 AESENC X0, X3 AESENC X0, X4 MOVUPS 80(CX), X0 AESENC X0, X1 AESENC X0, X2 AESENC X0, X3...