TEXT runtime·memequal<ABIInternal>(SB),NOSPLIT|NOFRAME,$0-25
	BEQ	R4, R5, eq
	ADDV	R4, R6, R7
	PCALIGN	$16
loop:
	BNE	R4, R7, test
	MOVV	$1, R4
	RET
test:
	MOVBU	(R4), R9
	ADDV	$1, R4
	MOVBU	(R5), R10
	ADDV	$1, R5
	BEQ	R9, R10, loop

	MOVB    R0, R4
	RET
eq:
	MOVV	$1, R4
	RET

// memequal_varlen(a, b unsafe.Pointer) bool
TEXT runtime·memequal_varlen<ABIInternal>(SB),NOSPLIT,$40-17
	BEQ	R4, R5, eq

	MOV	(X5), X6				// 03b30200
	MOV	4(X5), X6				// 03b34200
	MOVB	(X5), X6				// 03830200
	MOVB	4(X5), X6				// 03834200
	MOVH	(X5), X6				// 03930200
	MOVH	4(X5), X6				// 03934200
	MOVW	(X5), X6				// 03a30200
	MOVW	4(X5), X6				// 03a34200
	MOV	X5, (X6)				// 23305300
	MOV	X5, 4(X6)				// 23325300
	MOVB	X5, (X6)				// 23005300
	MOVB	X5, 4(X6)				// 23025300
	MOVH	X5, (X6)				// 23105300

	"FRSP",
	"FRSPCC",
	"FSUB",
	"FSUBCC",
	"FSUBS",
	"FSUBSCC",
	"ISEL",
	"MOVMW",
	"LBAR",
	"LHAR",
	"LSW",
	"LWAR",
	"LWSYNC",
	"MOVDBR",
	"MOVWBR",
	"MOVB",
	"MOVBU",
	"MOVBZ",
	"MOVBZU",
	"MOVH",
	"MOVHBR",
	"MOVHU",
	"MOVHZ",
	"MOVHZU",
	"MOVW",
	"MOVWU",
	"MOVFL",
	"MOVCRFS",
	"MTFSB0",
	"MTFSB0CC",
	"MTFSB1",
	"MTFSB1CC",

func signextendAndMask8to64(a int8) (s, z uint64) {
	// ppc64x: "MOVB", "ANDCC\t[$]1015,"
	s = uint64(a) & 0x3F7
	// ppc64x: -"MOVB", "ANDCC\t[$]247,"
	z = uint64(uint8(a)) & 0x3F7
	return
}

// Verify zero-extended values are not sign-extended under a bit mask (#61297)
func zeroextendAndMask8to64(a int8, b int16) (x, y uint64) {
	// ppc64x: -"MOVB\t", -"ANDCC", "MOVBZ"
	x = uint64(a) & 0xFF
	// ppc64x: -"MOVH\t", -"ANDCC", "MOVHZ"

	RET

// void ·Or8(byte volatile*, byte);
TEXT ·Or8(SB), NOSPLIT, $0-9
	MOVD	ptr+0(FP), R3
	MOVBZ	val+8(FP), R4
	LWSYNC
again:
	LBAR	(R3), R6
	OR	R4, R6
	STBCCC	R6, (R3)
	BNE	again
	RET

// void ·And8(byte volatile*, byte);
TEXT ·And8(SB), NOSPLIT, $0-9
	MOVD	ptr+0(FP), R3
	MOVBZ	val+8(FP), R4
	LWSYNC
again:
	LBAR	(R3), R6
	AND	R4, R6
	STBCCC	R6, (R3)
	BNE	again
	RET

		// Conversions
		{name: "MOVBreg", argLength: 1, reg: gp11, asm: "MOVB"},   // move from arg0, sign-extended from byte
		{name: "MOVHreg", argLength: 1, reg: gp11, asm: "MOVH"},   // move from arg0, sign-extended from half
		{name: "MOVWreg", argLength: 1, reg: gp11, asm: "MOVW"},   // move from arg0, sign-extended from word
		{name: "MOVDreg", argLength: 1, reg: gp11, asm: "MOV"},    // move from arg0

	CMP	R0, R2
	BNE	casfail

#ifndef GOARM_7
	MOVB	internal∕cpu·ARM+const_offsetARMHasV7Atomics(SB), R11
	CMP	$0, R11
	BEQ	2(PC)
#endif
	DMB	MB_ISHST

	STREX	R3, (R1), R0
	CMP	$0, R0
	BNE	casl
	MOVW	$1, R0

#ifndef GOARM_7
	CMP	$0, R11
	BEQ	2(PC)
#endif
	DMB	MB_ISH

	MOVB	R0, ret+12(FP)
	RET
casfail:
	MOVW	$0, R0
	MOVB	R0, ret+12(FP)
	RET

// stubs

	}

	// It must be followed by a MOVQ SP, BP.
	movbp := pushbp.Link
	if movbp == nil {
		ctxt.Diag("missing frame pointer instruction: MOVQ SP, BP")
		return
	}
	if !(movbp.As == AMOVQ && movbp.From.Type == obj.TYPE_REG && movbp.From.Reg == REG_SP &&
		movbp.To.Type == obj.TYPE_REG && movbp.To.Reg == REG_BP && movbp.From.Offset == 0) {
		ctxt.Diag("unexpected frame pointer instruction\n%v", movbp)
		return
	}

	RET

TEXT ·Store8(SB), NOSPLIT, $0-9
	MOVV	ptr+0(FP), R4
	MOVB	val+8(FP), R5
	DBAR
	MOVB	R5, 0(R4)
	DBAR
	RET

TEXT ·Store64(SB), NOSPLIT, $0-16
	MOVV	ptr+0(FP), R4
	MOVV	val+8(FP), R5
	DBAR
	MOVV	R5, 0(R4)
	DBAR
	RET

// void	Or8(byte volatile*, byte);
TEXT ·Or8(SB), NOSPLIT, $0-9
	MOVV	ptr+0(FP), R4
	MOVBU	val+8(FP), R5

	SC	R3, (R1)	// *R1 = R3
	BEQ	R3, try_cas
	SYNC
	MOVB	R3, ret+12(FP)
	RET
cas_fail:
	SYNC
	MOVB	R0, ret+12(FP)
	RET

TEXT ·Store(SB),NOSPLIT,$0-8
	MOVW	ptr+0(FP), R1
	MOVW	val+4(FP), R2
	SYNC
	MOVW	R2, 0(R1)
	SYNC
	RET

TEXT ·Store8(SB),NOSPLIT,$0-5
	MOVW	ptr+0(FP), R1
	MOVB	val+4(FP), R2
	SYNC
	MOVB	R2, 0(R1)
	SYNC
	RET

TEXT ·Load(SB),NOSPLIT,$0-8