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Results 31 - 40 of 45 for f12a (0.06 sec)

  1. src/cmd/asm/internal/asm/operand_test.go

    	{"F1", "F1"},
    	{"F2", "F2"},
    	{"F3", "F3"},
    	{"F4", "F4"},
    	{"F5", "F5"},
    	{"F6", "F6"},
    	{"F7", "F7"},
    	{"F8", "F8"},
    	{"F9", "F9"},
    	{"F10", "F10"},
    	{"F11", "F11"},
    	{"F12", "F12"},
    	{"F13", "F13"},
    	{"F14", "F14"},
    	{"F15", "F15"},
    	{"V0", "V0"},
    	{"V1", "V1"},
    	{"V2", "V2"},
    	{"V3", "V3"},
    	{"V4", "V4"},
    	{"V5", "V5"},
    	{"V6", "V6"},
    	{"V7", "V7"},
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 29 18:31:05 UTC 2023
    - 23.9K bytes
    - Viewed (0)
  2. src/unicode/letter_test.go

    	// 0133;LATIN SMALL LIGATURE IJ;Ll;0;L;<compat> 0069 006A;;;;N;LATIN SMALL LETTER I J;;0132;;0132
    	{UpperCase, 0x0133, 0x0132},
    	{LowerCase, 0x0133, 0x0133},
    	{TitleCase, 0x0133, 0x0132},
    
    	// 212A;KELVIN SIGN;Lu;0;L;004B;;;;N;DEGREES KELVIN;;;006B;
    	{UpperCase, 0x212A, 0x212A},
    	{LowerCase, 0x212A, 'k'},
    	{TitleCase, 0x212A, 0x212A},
    
    	// From an UpperLower sequence
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat Sep 09 01:46:03 UTC 2023
    - 14.8K bytes
    - Viewed (0)
  3. src/runtime/asm_loong64.s

    	MOVD	F4, (20*8)(R25)
    	MOVD	F5, (21*8)(R25)
    	MOVD	F6, (22*8)(R25)
    	MOVD	F7, (23*8)(R25)
    	MOVD	F8, (24*8)(R25)
    	MOVD	F9, (25*8)(R25)
    	MOVD	F10, (26*8)(R25)
    	MOVD	F11, (27*8)(R25)
    	MOVD	F12, (28*8)(R25)
    	MOVD	F13, (29*8)(R25)
    	MOVD	F14, (30*8)(R25)
    	MOVD	F15, (31*8)(R25)
    	RET
    
    // unspillArgs loads args into registers from a *internal/abi.RegArgs in R25.
    TEXT ·unspillArgs(SB),NOSPLIT,$0-0
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 13 15:04:25 UTC 2024
    - 26.5K bytes
    - Viewed (2)
  4. src/text/tabwriter/tabwriter_test.go

    		"本\tb\tc\n" +
    			"aa\t\u672c\u672c\u672c\tcccc\tddddd\n" +
    			"aaa\tbbbb\n",
    
    		"本.......b.......c\n" +
    			"aa......本本本.....cccc....ddddd\n" +
    			"aaa.....bbbb\n",
    	},
    
    	{
    		"12a",
    		8, 0, 1, ' ', AlignRight,
    		"a\tè\tc\t\n" +
    			"aa\tèèè\tcccc\tddddd\t\n" +
    			"aaa\tèèèè\t\n",
    
    		"       a       è       c\n" +
    			"      aa     èèè    cccc   ddddd\n" +
    			"     aaa    èèèè\n",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Feb 29 16:46:34 UTC 2024
    - 13.8K bytes
    - Viewed (0)
  5. src/net/ip_test.go

    	{&IPNet{IP: IPv4(192, 168, 1, 0), Mask: IPv4Mask(255, 0, 255, 0)}, "192.168.1.0/ff00ff00"},
    	{&IPNet{IP: ParseIP("2001:db8::"), Mask: CIDRMask(55, 128)}, "2001:db8::/55"},
    	{&IPNet{IP: ParseIP("2001:db8::"), Mask: IPMask(ParseIP("8000:f123:0:cafe::"))}, "2001:db8::/8000f1230000cafe0000000000000000"},
    	{nil, "<nil>"},
    }
    
    func TestIPNetString(t *testing.T) {
    	for _, tt := range ipNetStringTests {
    		if out := tt.in.String(); out != tt.out {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Mar 07 01:17:29 UTC 2024
    - 25.7K bytes
    - Viewed (0)
  6. src/cmd/compile/internal/test/abiutils_test.go

            IN 15: R{ F7 } spilloffset: 72 typ: float64
            IN 16: R{ F8 F9 } spilloffset: 80 typ: complex128
            IN 17: R{ F10 F11 } spilloffset: 96 typ: complex128
            IN 18: R{ F12 F13 } spilloffset: 112 typ: complex128
            IN 19: R{ } offset: 0 typ: complex128
            IN 20: R{ } offset: 16 typ: complex64
            IN 21: R{ I8 } spilloffset: 128 typ: int8
            IN 22: R{ } offset: 24 typ: int16
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Oct 04 15:11:40 UTC 2023
    - 14.2K bytes
    - Viewed (0)
  7. src/cmd/compile/internal/ssa/_gen/ARM64Ops.go

    	"R29", // frame pointer, not used
    	"R30", // aka REGLINK
    	"SP",  // aka R31
    
    	"F0",
    	"F1",
    	"F2",
    	"F3",
    	"F4",
    	"F5",
    	"F6",
    	"F7",
    	"F8",
    	"F9",
    	"F10",
    	"F11",
    	"F12",
    	"F13",
    	"F14",
    	"F15",
    	"F16",
    	"F17",
    	"F18",
    	"F19",
    	"F20",
    	"F21",
    	"F22",
    	"F23",
    	"F24",
    	"F25",
    	"F26",
    	"F27",
    	"F28",
    	"F29",
    	"F30",
    	"F31",
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 58.8K bytes
    - Viewed (0)
  8. src/cmd/compile/internal/ssa/_gen/ARMOps.go

    	"R11", // tmp
    	"R12",
    	"SP",  // aka R13
    	"R14", // link
    	"R15", // pc
    
    	"F0",
    	"F1",
    	"F2",
    	"F3",
    	"F4",
    	"F5",
    	"F6",
    	"F7",
    	"F8",
    	"F9",
    	"F10",
    	"F11",
    	"F12",
    	"F13",
    	"F14",
    	"F15", // tmp
    
    	// If you add registers, update asyncPreempt in runtime.
    
    	// pseudo-registers
    	"SB",
    }
    
    func init() {
    	// Make map from reg names to reg integers.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Feb 24 00:21:13 UTC 2023
    - 41K bytes
    - Viewed (0)
  9. tensorflow/cc/saved_model/testdata/chunked_saved_model/chunked_model/saved_model.pbtxt

    21\213)\343?\277u\355,\3232\344?@F\343\245[.\252?\344\335\316\267\3725\351?\220i\274Pe\214\257?@\340&\207wa\306?\005T4m\2228\345?\316S\202\025\323}\353?\360\217\026\212+]\337?(z\365\274!Y\321?Y\276\302\255\270\277\342?n\322\2503\003\356\347?`E\355\212A|\277?x&\207\005\245\265\341?\224\277\224\270\363}\344?:I\216\202\310\242\336?\332\020Ah\256\260\343?\317\r\'\360\257\020\355?\300\302\322]Q\'\236?\227\244\026T\277\371\344?\237o\273\202~\022\347?\2401i\331R\035\223?\037\260d\371jT\345?\212I\360g\2...
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Thu Jun 08 21:43:11 UTC 2023
    - 531.2K bytes
    - Viewed (0)
  10. src/runtime/asm_arm64.s

    	STP	(R14, R15), (14*8)(R20)
    	FSTPD	(F0, F1), (16*8)(R20)
    	FSTPD	(F2, F3), (18*8)(R20)
    	FSTPD	(F4, F5), (20*8)(R20)
    	FSTPD	(F6, F7), (22*8)(R20)
    	FSTPD	(F8, F9), (24*8)(R20)
    	FSTPD	(F10, F11), (26*8)(R20)
    	FSTPD	(F12, F13), (28*8)(R20)
    	FSTPD	(F14, F15), (30*8)(R20)
    	RET
    
    // unspillArgs loads args into registers from a *internal/abi.RegArgs in R20.
    TEXT ·unspillArgs(SB),NOSPLIT,$0-0
    	LDP	(0*8)(R20), (R0, R1)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat May 11 20:38:24 UTC 2024
    - 43.4K bytes
    - Viewed (0)
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