PCALIGN $16
loop2:
	MOVW (DI), SI
	CMPW SI,R8
	JZ success
	ADDQ $1,DI
	CMPQ DI,DX
	JB loop2
	JMP fail
_3_or_more:
	CMPQ AX, $3
	JA   _4_or_more
	MOVW 1(R8), BX
	MOVW (R8), R8
	LEAQ -2(DI)(DX*1), DX
loop3:
	MOVW (DI), SI
	CMPW SI,R8
	JZ   partial_success3
	ADDQ $1,DI
	CMPQ DI,DX
	JB loop3
	JMP fail
partial_success3:
	MOVW 1(DI), SI
	CMPW SI,BX
	JZ success
	ADDQ $1,DI

    public static short dec_uint16be( byte[] src, int si )
    {
        return (short)(((src[si] & 0xFF) << 8) | (src[si + 1] & 0xFF));
    }
    public static int dec_uint32be( byte[] src, int si )
    {
        return ((src[si] & 0xFF) << 24) | ((src[si + 1] & 0xFF) << 16) |
               ((src[si + 2] & 0xFF) << 8) | (src[si + 3] & 0xFF);
    }
    public static short dec_uint16le( byte[] src, int si )
    {

// func mulAddVWW(z, x []Word, y, r Word) (c Word)
TEXT ·mulAddVWW(SB),NOSPLIT,$0
	MOVL z+0(FP), DI
	MOVL x+12(FP), SI
	MOVL y+24(FP), BP
	MOVL r+28(FP), CX	// c = r
	MOVL z_len+4(FP), BX
	LEAL (DI)(BX*4), DI
	LEAL (SI)(BX*4), SI
	NEGL BX			// i = -n
	JMP E5

L5:	MOVL (SI)(BX*4), AX
	MULL BP
	ADDL CX, AX
	ADCL $0, DX
	MOVL AX, (DI)(BX*4)
	MOVL DX, CX
	ADDL $1, BX		// i++

	LEAQ	0(BX*8), CX
	NEGQ	CX

	CMPB	SI, $0xf8
	JA	si_high

	// load at SI won't cross a page boundary.
	MOVQ	(SI), SI
	JMP	si_finish
si_high:
	// address ends in 11111xxx. Load up to bytes we want, move to correct position.
	MOVQ	-8(SI)(BX*1), SI
	SHRQ	CX, SI
si_finish:

	// same for DI.
	CMPB	DI, $0xf8
	JA	di_high
	MOVQ	(DI), DI
	JMP	di_finish
di_high:
	MOVQ	-8(DI)(BX*1), DI

	V4FMADDPS -17(BP)(SI*4), [Z0-Z3], K2, Z0           // 62f27f4a9a84b5efffffff
	V4FMADDPS 17(SP), [Z10-Z13], K2, Z0                // 62f22f4a9a842411000000
	V4FMADDPS -17(BP)(SI*4), [Z10-Z13], K2, Z0         // 62f22f4a9a84b5efffffff
	V4FMADDPS 17(SP), [Z20-Z23], K2, Z0                // 62f25f429a842411000000
	V4FMADDPS -17(BP)(SI*4), [Z20-Z23], K2, Z0         // 62f25f429a84b5efffffff

	// Add back carry flags and return
	ADCXQ SI, BX
	ADOXQ SI, BX
	MOVQ  BX, c+24(FP)
	RET

// func addMulVVW1536(z *uint, x *uint, y uint) (c uint)
// Requires: ADX, BMI2
TEXT ·addMulVVW1536(SB), $0-32
	CMPB ·supportADX+0(SB), $0x01
	JEQ  adx
	MOVQ z+0(FP), CX
	MOVQ x+8(FP), BX
	MOVQ y+16(FP), SI
	XORQ DI, DI

	// Iteration 0
	MOVQ (BX), AX
	MULQ SI
	ADDQ (CX), AX
	ADCQ $0x00, DX

        for ( int si = 0; si < sids.length; si++ ) {
            this.sids[ si ] = new lsarpc.LsarSidPtr();
            this.sids[ si ].sid = sids[ si ].unwrap(sid_t.class);
        }
    }


    LsarSidArrayX ( SID[] sids ) {
        this.num_sids = sids.length;
        this.sids = new lsarpc.LsarSidPtr[sids.length];
        for ( int si = 0; si < sids.length; si++ ) {

	SHRQ	$3, CX
	ANDQ	$7, BX

	SUBQ	$8, DI
	SUBQ	$8, SI
	REP;	MOVSQ

	CLD
	ADDQ	$8, DI
	ADDQ	$8, SI
	SUBQ	BX, DI
	SUBQ	BX, SI
	JMP	tail

move_1or2:
	MOVB	(SI), AX
	MOVB	-1(SI)(BX*1), CX
	MOVB	AX, (DI)
	MOVB	CX, -1(DI)(BX*1)
	RET
move_0:
	RET
move_3or4:
	MOVW	(SI), AX
	MOVW	-2(SI)(BX*1), CX
	MOVW	AX, (DI)
	MOVW	CX, -2(DI)(BX*1)
	RET
move_5through7:

	CRC32Q (SI), AX
	ADDQ $8, SI
	SUBQ $8, CX
	JMP aligned

less_than_8:
	// We may have some bytes left over; process 4 bytes, then 2, then 1.
	BTQ $2, CX
	JNC less_than_4

	CRC32L (SI), AX
	ADDQ $4, SI

less_than_4:
	BTQ $1, CX
	JNC less_than_2

	CRC32W (SI), AX
	ADDQ $2, SI

less_than_2:
	BTQ $0, CX
	JNC done

	CRC32B (SI), AX

done:
	MOVL AX, ret+32(FP)
	RET

	SHRL	$2, CX
	ANDL	$3, BX

	SUBL	$4, DI
	SUBL	$4, SI
	REP;	MOVSL

	CLD
	ADDL	$4, DI
	ADDL	$4, SI
	SUBL	BX, DI
	SUBL	BX, SI
	JMP	tail

move_1or2:
	MOVB	(SI), AX
	MOVB	-1(SI)(BX*1), CX
	MOVB	AX, (DI)
	MOVB	CX, -1(DI)(BX*1)
	RET
move_0:
	RET
move_3:
	MOVW	(SI), AX
	MOVB	2(SI), CX
	MOVW	AX, (DI)
	MOVB	CX, 2(DI)
	RET
move_4: