- Sort Score
- Result 10 results
- Languages All
Results 11 - 17 of 17 for REG_R31 (0.32 sec)
-
src/cmd/internal/obj/ppc64/asm_test.go
} rout++ } } var testType = []struct { rstart int rend int msk int rout int }{ {REG_VS0, REG_VS63, 63, 0}, {REG_R0, REG_R31, 31, 0}, {REG_F0, REG_F31, 31, 0}, {REG_V0, REG_V31, 31, 0}, {REG_V0, REG_V31, 63, 32}, {REG_F0, REG_F31, 63, 0}, {REG_SPR0, REG_SPR0 + 1023, 1023, 0}, {REG_CR0, REG_CR7, 7, 0},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 09 22:14:57 UTC 2024 - 17.3K bytes - Viewed (0) -
src/cmd/internal/obj/loong64/obj.go
p.Mark |= BRANCH // MOV LINK, R31 p = obj.Appendp(p, c.newprog) p.As = mov p.From.Type = obj.TYPE_REG p.From.Reg = REGLINK p.To.Type = obj.TYPE_REG p.To.Reg = REG_R31 if q != nil { q.To.SetTarget(p) p.Mark |= LABEL } p = c.ctxt.EmitEntryStackMap(c.cursym, p, c.newprog) // Spill the register args that could be clobbered by the // morestack code
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 19:22:18 UTC 2023 - 19.7K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/asm7.go
c.ctxt.Diag("invalid register pair %v\n", p) } case ALDP, ALDPW, ALDPSW: if rl < REG_R0 || REG_R31 < rl || rh < REG_R0 || REG_R31 < rh { c.ctxt.Diag("invalid register pair %v\n", p) } case ASTP, ASTPW: if rl < REG_R0 || REG_R31 < rl || rh < REG_R0 || REG_R31 < rh { c.ctxt.Diag("invalid register pair %v\n", p) } } // other conditional flag bits switch o.scond {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 15:44:14 UTC 2024 - 201.1K bytes - Viewed (0) -
src/cmd/internal/obj/mips/asm0.go
return uint64(uint32(v)) == v } func (c *ctxt0) aclass(a *obj.Addr) int { switch a.Type { case obj.TYPE_NONE: return C_NONE case obj.TYPE_REG: if REG_R0 <= a.Reg && a.Reg <= REG_R31 { return C_REG } if REG_F0 <= a.Reg && a.Reg <= REG_F31 { return C_FREG } if REG_M0 <= a.Reg && a.Reg <= REG_M31 { return C_MREG } if REG_FCR0 <= a.Reg && a.Reg <= REG_FCR31 {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 16 17:46:09 UTC 2024 - 53.6K bytes - Viewed (0) -
src/cmd/internal/obj/loong64/asm.go
return uint64(uint32(v)) == v } func (c *ctxt0) aclass(a *obj.Addr) int { switch a.Type { case obj.TYPE_NONE: return C_NONE case obj.TYPE_REG: if REG_R0 <= a.Reg && a.Reg <= REG_R31 { return C_REG } if REG_F0 <= a.Reg && a.Reg <= REG_F31 { return C_FREG } if REG_FCSR0 <= a.Reg && a.Reg <= REG_FCSR31 { return C_FCSRREG }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 61.8K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/asm9.go
func isint32(v int64) bool { return int64(int32(v)) == v } func isuint32(v uint64) bool { return uint64(uint32(v)) == v } func (c *ctxt9) aclassreg(reg int16) int { if REG_R0 <= reg && reg <= REG_R31 { return C_REGP + int(reg&1) } if REG_F0 <= reg && reg <= REG_F31 { return C_FREGP + int(reg&1) } if REG_V0 <= reg && reg <= REG_V31 { return C_VREG }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 13:55:28 UTC 2024 - 156.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
{24, loong64.REG_R25, 20, "R25"}, {25, loong64.REG_R26, 21, "R26"}, {26, loong64.REG_R27, 22, "R27"}, {27, loong64.REG_R28, 23, "R28"}, {28, loong64.REG_R29, 24, "R29"}, {29, loong64.REG_R31, 25, "R31"}, {30, loong64.REG_F0, -1, "F0"}, {31, loong64.REG_F1, -1, "F1"}, {32, loong64.REG_F2, -1, "F2"}, {33, loong64.REG_F3, -1, "F3"}, {34, loong64.REG_F4, -1, "F4"},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0)