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Results 31 - 40 of 142 for r13 (0.02 sec)
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src/internal/types/testdata/check/decls3.go
*R10 *R11 *R12 } type R6 R5 type R7 R5 type R8 R5 type R9 struct { *R13 *R14 *R15 *R16 } type R10 R9 type R11 R9 type R12 R9 type R13 struct { *R17 *R18 *R19 *R20 } type R14 R13 type R15 R13 type R16 R13 type R17 struct { *R21 *R22 *R23 *R24 } type R18 R17 type R19 R17
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 23:16:04 UTC 2023 - 4.2K bytes - Viewed (0) -
src/runtime/asm_loong64.s
MOVV (g_sched+gobuf_sp)(g), R3 // Now on a scheduling stack (a pthread-created stack). g0: // Save room for two of our pointers. ADDV $-16, R3 MOVV R13, 0(R3) // save old g on stack MOVV (g_stack+stack_hi)(R13), R13 SUBVU R12, R13 MOVV R13, 8(R3) // save depth in old g stack (can't just save SP, as stack might be copied during a callback) JAL (R25) // Restore g, stack pointer. R4 is return value.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 13 15:04:25 UTC 2024 - 26.5K bytes - Viewed (0) -
src/cmd/asm/internal/asm/operand_test.go
{"-12(R4)", "-12(R4)"}, {"0(PC)", "0(PC)"}, {"1024", "1024"}, {"12(R(1))", "12(R1)"}, {"12(R13)", "12(R13)"}, {"R0", "R0"}, {"R0->(32-1)", "R0->31"}, {"R0<<R1", "R0<<R1"}, {"R0>>R(1)", "R0>>R1"}, {"R0@>(32-1)", "R0@>31"}, {"R1", "R1"}, {"R11", "R11"}, {"R12", "R12"}, {"R13", "R13"}, {"R14", "R14"}, {"R15", "R15"}, {"R1<<2(R3)", "R1<<2(R3)"}, {"R(1)<<2(R(3))", "R1<<2(R3)"},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 29 18:31:05 UTC 2023 - 23.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64enc_extra.s
VPGATHERQQ Y2, (BP)(Y7*2), Y1 // c4e2ed914c7d00 VPGATHERQQ X12, (R13)(X14*2), X11 // c40299915c7500 VPGATHERQQ Y12, (R13)(Y14*2), Y11 // c4029d915c7500 VPGATHERQQ X2, (BP)(X7*2), X1 // c4e2e9914c7d00 VPGATHERQQ Y2, (BP)(Y7*2), Y1 // c4e2ed914c7d00 VPGATHERQQ X12, (R13)(X14*2), X11 // c40299915c7500 VPGATHERQQ Y12, (R13)(Y14*2), Y11 // c4029d915c7500
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 11 18:32:50 UTC 2023 - 57.6K bytes - Viewed (0) -
src/runtime/libfuzzer_amd64.s
MOVQ hookId+8(FP), RARG0 MOVQ s1+16(FP), RARG1 MOVQ s2+24(FP), RARG2 MOVQ result+32(FP), RARG3 get_tls(R12) MOVQ g(R12), R14 MOVQ g_m(R14), R13 // Switch to g0 stack. MOVQ SP, R12 // callee-saved, preserved across the CALL MOVQ m_g0(R13), R10 CMPQ R10, R14 JE call // already on g0 MOVQ (g_sched+gobuf_sp)(R10), SP call: ANDQ $~15, SP // alignment for gcc ABI CALL AX MOVQ R12, SP RET
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 10 04:57:07 UTC 2023 - 5K bytes - Viewed (0) -
src/runtime/race_amd64.s
MOVQ g(R12), R14 MOVQ g_m(R14), R13 MOVQ m_g0(R13), R15 CMPQ R13, R15 JEQ noswitch // branch if already on g0 MOVQ R15, g(R12) // g = m->g0 MOVQ R15, R14 // set g register PUSHQ RARG1 // func arg PUSHQ RARG0 // func arg CALL runtime·racecallback(SB) POPQ R12 POPQ R12 // All registers are smashed after Go code, reload. get_tls(R12) MOVQ g(R12), R13 MOVQ g_m(R13), R13
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 18:37:29 UTC 2024 - 15.1K bytes - Viewed (0) -
src/cmd/cgo/internal/test/issue9400/asm_arm.s
// will clobber the test pattern created by the caller ADD $(1024 * 8), R13 // Ask signaller to setgid MOVW $·Baton(SB), R2 storeloop: MOVW 0(R2), R0 MOVW $1, R1 BL cas<>(SB) BCC storeloop // Wait for setgid completion loop: MOVW $0, R0 MOVW $0, R1 BL cas<>(SB) BCC loop // Restore stack SUB $(1024 * 8), R13 MOVW R4, R14
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 12 12:00:02 UTC 2023 - 758 bytes - Viewed (0) -
src/runtime/mkpreempt.go
} // Add flag register. l.addSpecial( "MOVW CPSR, R0\nMOVW R0, %d(R13)", "MOVW %d(R13), R0\nMOVW R0, CPSR", 4) // Add floating point registers F0-F15 and flag register. var lfp = layout{stack: l.stack, sp: "R13"} lfp.addSpecial( "MOVW FPCR, R0\nMOVW R0, %d(R13)", "MOVW %d(R13), R0\nMOVW R0, FPCR", 4) for i := 0; i <= 15; i++ { reg := fmt.Sprintf("F%d", i) lfp.add("MOVD", reg, 8)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 15.3K bytes - Viewed (0) -
test/codegen/logic.go
// of the args of the ANDQ needs to be saved so it can be used as the arg to TESTQ. func andWithUse(x, y int) int { z := x & y // amd64:`TESTQ\s(AX, AX|BX, BX|CX, CX|DX, DX|SI, SI|DI, DI|R8, R8|R9, R9|R10, R10|R11, R11|R12, R12|R13, R13|R15, R15)` if z == 0 { return 77 } // use z by returning it return z } // Verify (OR x (NOT y)) rewrites to (ORN x y) where supported func ornot(x, y int) int { // ppc64x:"ORN" z := x | ^y
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 10 16:32:25 UTC 2023 - 1.1K bytes - Viewed (0) -
src/runtime/defs_windows_amd64.go
print("r8 ", hex(r.r8), "\n") print("r9 ", hex(r.r9), "\n") print("r10 ", hex(r.r10), "\n") print("r11 ", hex(r.r11), "\n") print("r12 ", hex(r.r12), "\n") print("r13 ", hex(r.r13), "\n") print("r14 ", hex(r.r14), "\n") print("r15 ", hex(r.r15), "\n") print("rip ", hex(r.rip), "\n") print("rflags ", hex(r.eflags), "\n") print("cs ", hex(r.segcs), "\n")
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 05 08:26:52 UTC 2023 - 3.2K bytes - Viewed (0)