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Results 11 - 20 of 42 for cbr0 (0.05 sec)
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src/cmd/internal/obj/ppc64/doc.go
at bit 0, CR1 at bit 4, etc. The value is computed as 4*CR+condition with these condition values: 0 -> LT 1 -> GT 2 -> EQ 3 -> OVG Thus 0 means test CR0 for LT, 5 means CR1 for GT, 30 means CR7 for EQ. op3: branch target Examples: BC 12, 0, target <=> blt cr0, target BC 12, 2, target <=> beq cr0, target
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 16:47:45 UTC 2023 - 11.3K bytes - Viewed (0) -
src/image/png/writer.go
cr0 := cr[0] stride, pix := 0, []byte(nil) if rgba != nil { stride, pix = rgba.Stride, rgba.Pix } else if nrgba != nil { stride, pix = nrgba.Stride, nrgba.Pix } if stride != 0 { j0 := (y - b.Min.Y) * stride j1 := j0 + b.Dx()*4 for j := j0; j < j1; j += 4 { cr0[i+0] = pix[j+0] cr0[i+1] = pix[j+1] cr0[i+2] = pix[j+2]
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 11 17:08:05 UTC 2024 - 15.4K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/gnu.go
// like a branch or isel that is testing a bit in a condition // register field. if arg == CR0 && strings.HasPrefix(inst.Op.String(), "cmp") { return "" // don't show cr0 for cmp instructions } else if arg >= CR0 { return fmt.Sprintf("cr%d", int(arg-CR0)) } bit := condBit[(arg-Cond0LT)%4] if arg <= Cond0SO { return bit }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:33 UTC 2023 - 12.2K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/x86/x86asm/inst.go
X15: "X15", CS: "CS", SS: "SS", DS: "DS", ES: "ES", FS: "FS", GS: "GS", GDTR: "GDTR", IDTR: "IDTR", LDTR: "LDTR", MSW: "MSW", TASK: "TASK", CR0: "CR0", CR1: "CR1", CR2: "CR2", CR3: "CR3", CR4: "CR4", CR5: "CR5", CR6: "CR6", CR7: "CR7", CR8: "CR8", CR9: "CR9", CR10: "CR10", CR11: "CR11", CR12: "CR12",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:33 UTC 2023 - 10.6K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64error.s
// Forbid memory operands for MOV CR/DR. See #24981. MOVQ CR0, (AX) // ERROR "invalid instruction" MOVQ CR2, (AX) // ERROR "invalid instruction" MOVQ CR3, (AX) // ERROR "invalid instruction" MOVQ CR4, (AX) // ERROR "invalid instruction" MOVQ CR8, (AX) // ERROR "invalid instruction" MOVQ (AX), CR0 // ERROR "invalid instruction"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Jun 14 00:03:57 UTC 2023 - 8.9K bytes - Viewed (0) -
src/internal/bytealg/indexbyte_ppc64x.s
VCMPEQUBCC V2,V1,V6 BNE CR6,foundat3 // Match found at R8+48 bytes, jump out ADD $64,R8 CMPU R8,R9,CR1 BNE CR1,loop64 // R8 != &s[len &^ 63]? PCALIGN $32 BEQ notfound // Is tail length 0? CR0 is set before entering loop64. CMP R4,$32 // Tail length >= 32, use cmp32 path. CMP R4,$16,CR1 BGE cmp32 ADD R8,R4,R9 ADD $-16,R9 BLE CR1,cmp64_tail_gt0
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 16:10:29 UTC 2023 - 6.3K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/x86/x86asm/plan9x.go
X15: "X15", CS: "CS", SS: "SS", DS: "DS", ES: "ES", FS: "FS", GS: "GS", GDTR: "GDTR", IDTR: "IDTR", LDTR: "LDTR", MSW: "MSW", TASK: "TASK", CR0: "CR0", CR1: "CR1", CR2: "CR2", CR3: "CR3", CR4: "CR4", CR5: "CR5", CR6: "CR6", CR7: "CR7", CR8: "CR8", CR9: "CR9", CR10: "CR10", CR11: "CR11", CR12: "CR12",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Jul 12 20:38:21 UTC 2023 - 7.2K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/ppc64.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 21:53:50 UTC 2024 - 50.2K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/plan9.go
STFD, STFDU, STFS, STFSU, STQ, HASHST, HASHSTP: return op + " " + strings.Join(args, ",") case FCMPU, FCMPO, CMPD, CMPDI, CMPLD, CMPLDI, CMPW, CMPWI, CMPLW, CMPLWI: crf := int(inst.Args[0].(CondReg) - CR0) cmpstr := op + " " + args[1] + "," + args[2] if crf != 0 { // print CRx as the final operand if not implied (i.e BF != 0) cmpstr += "," + args[0] } return cmpstr case LIS:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 22 17:16:14 UTC 2022 - 10.9K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/decode.go
return nil case TypeUnknown: return nil case TypeReg: return R0 + Reg(a.BitFields.Parse(i)) case TypeCondRegBit: return Cond0LT + CondReg(a.BitFields.Parse(i)) case TypeCondRegField: return CR0 + CondReg(a.BitFields.Parse(i)) case TypeFPReg: return F0 + Reg(a.BitFields.Parse(i)) case TypeVecReg: return V0 + Reg(a.BitFields.Parse(i)) case TypeVecSReg: return VS0 + Reg(a.BitFields.Parse(i))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 22 17:16:14 UTC 2022 - 5.6K bytes - Viewed (0)