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Results 61 - 70 of 167 for bx (0.03 sec)
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src/cmd/asm/internal/asm/testdata/amd64error.s
// CLWB instructions: CLWB BX // ERROR "invalid instruction" // CLDEMOTE instructions: CLDEMOTE BX // ERROR "invalid instruction" // WAITPKG instructions: TPAUSE (BX) // ERROR "invalid instruction" UMONITOR (BX) // ERROR "invalid instruction" UMWAIT (BX) // ERROR "invalid instruction"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Jun 14 00:03:57 UTC 2023 - 8.9K bytes - Viewed (0) -
src/crypto/internal/edwards25519/field/_asm/fe_amd64_asm.go
RET() } // mul64 sets r to i * aX * bX. func mul64(r uint128, i int, aX, bX namedComponent) { switch i { case 1: Comment(fmt.Sprintf("%s = %s×%s", r, aX, bX)) Load(aX, RAX) case 2: Comment(fmt.Sprintf("%s = 2×%s×%s", r, aX, bX)) Load(aX, RAX) SHLQ(Imm(1), RAX) default: panic("unsupported i value") } MULQ(mustAddr(bX)) // RDX, RAX = RAX * bX MOVQ(RAX, r.lo) MOVQ(RDX, r.hi) }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 7.2K bytes - Viewed (0) -
src/crypto/subtle/xor_amd64.s
TEXT ·xorBytes(SB), NOSPLIT, $0 MOVQ dst+0(FP), BX MOVQ a+8(FP), SI MOVQ b+16(FP), CX MOVQ n+24(FP), DX TESTQ $15, DX // AND 15 & len, if not zero jump to not_aligned. JNZ not_aligned aligned: MOVQ $0, AX // position in slices PCALIGN $16 loop16b: MOVOU (SI)(AX*1), X0 // XOR 16byte forwards. MOVOU (CX)(AX*1), X1 PXOR X1, X0 MOVOU X0, (BX)(AX*1) ADDQ $16, AX CMPQ DX, AX
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 26 18:14:32 UTC 2023 - 1.4K bytes - Viewed (0) -
src/runtime/sys_darwin_amd64.s
MOVQ _cgo_callers(SB), AX JMP AX TEXT runtime·mmap_trampoline(SB),NOSPLIT,$0 MOVQ DI, BX MOVQ 0(BX), DI // arg 1 addr MOVQ 8(BX), SI // arg 2 len MOVL 16(BX), DX // arg 3 prot MOVL 20(BX), CX // arg 4 flags MOVL 24(BX), R8 // arg 5 fid MOVL 28(BX), R9 // arg 6 offset CALL libc_mmap(SB) XORL DX, DX CMPQ AX, $-1 JNE ok CALL libc_error(SB)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Aug 03 16:07:59 UTC 2023 - 19.7K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/avx512enc/avx512_vnni.s
VPDPBUSD -15(BX), X16, K2, X6 // 62f27d0250b3f1ffffff VPDPBUSD X15, X28, K2, X6 // 62d21d0250f7 VPDPBUSD X11, X28, K2, X6 // 62d21d0250f3 VPDPBUSD X1, X28, K2, X6 // 62f21d0250f1 VPDPBUSD -15(R14)(R15*1), X28, K2, X6 // 62921d0250b43ef1ffffff VPDPBUSD -15(BX), X28, K2, X6 // 62f21d0250b3f1ffffff
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue May 22 14:57:15 UTC 2018 - 27.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
{1, 239}, // AX CX DX BX BP SI DI }, outputs: []outputInfo{ {0, 239}, // AX CX DX BX BP SI DI }, }, }, { name: "ADCLconst", auxType: auxInt32, argLen: 2, resultInArg0: true, clobberFlags: true, asm: x86.AADCL, reg: regInfo{ inputs: []inputInfo{ {0, 239}, // AX CX DX BX BP SI DI },
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/avx512enc/gfni_avx512f.s
VGF2P8AFFINEINVQB $27, (BX), Y20, K3, Y0 // 62f3dd23cf031b VGF2P8AFFINEINVQB $27, -17(BP)(SI*1), Y20, K3, Y0 // 62f3dd23cf8435efffffff1b VGF2P8AFFINEINVQB $27, Y5, Y12, K3, Y0 // 62f39d2bcfc51b VGF2P8AFFINEINVQB $27, Y28, Y12, K3, Y0 // 62939d2bcfc41b VGF2P8AFFINEINVQB $27, Y7, Y12, K3, Y0 // 62f39d2bcfc71b VGF2P8AFFINEINVQB $27, (BX), Y12, K3, Y0 // 62f39d2bcf031b
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue May 22 14:57:15 UTC 2018 - 22.6K bytes - Viewed (0) -
src/cmd/cgo/internal/test/issue9400/asm_386.s
//go:build gc #include "textflag.h" TEXT ·RewindAndSetgid(SB),NOSPLIT,$0-0 MOVL $·Baton(SB), BX // Rewind stack pointer so anything that happens on the stack // will clobber the test pattern created by the caller ADDL $(1024 * 8), SP // Ask signaller to setgid MOVL $1, (BX) // Wait for setgid completion loop: PAUSE MOVL (BX), AX CMPL AX, $0 JNE loop // Restore stack SUBL $(1024 * 8), SP
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 12 12:00:02 UTC 2023 - 575 bytes - Viewed (0) -
src/runtime/cgo/abi_amd64.h
#define PUSH_REGS_HOST_TO_ABI0() \ ADJSP $(REGS_HOST_TO_ABI0_STACK) \ MOVQ BP, (5*8)(SP) \ LEAQ (5*8)(SP), BP \ MOVQ BX, (0*8)(SP) \ MOVQ R12, (1*8)(SP) \ MOVQ R13, (2*8)(SP) \ MOVQ R14, (3*8)(SP) \ MOVQ R15, (4*8)(SP) #define POP_REGS_HOST_TO_ABI0() \ MOVQ (0*8)(SP), BX \ MOVQ (1*8)(SP), R12 \ MOVQ (2*8)(SP), R13 \ MOVQ (3*8)(SP), R14 \ MOVQ (4*8)(SP), R15 \ MOVQ (5*8)(SP), BP \
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Apr 15 12:38:13 UTC 2021 - 2.7K bytes - Viewed (0) -
src/runtime/sys_linux_amd64.s
MOVQ g_m(R14), BX // BX unchanged by C code. // Set vdsoPC and vdsoSP for SIGPROF traceback. // Save the old values on stack and restore them on exit, // so this function is reentrant. MOVQ m_vdsoPC(BX), CX MOVQ m_vdsoSP(BX), DX MOVQ CX, 0(SP) MOVQ DX, 8(SP) LEAQ ret+0(FP), DX MOVQ -8(DX), CX MOVQ CX, m_vdsoPC(BX) MOVQ DX, m_vdsoSP(BX)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Mar 24 18:53:44 UTC 2023 - 15.7K bytes - Viewed (0)