// R27 reserved by kernel
	"R28",
	"SP",  // aka R29
	"g",   // aka R30
	"R31", // REGLINK

	// odd FP registers contain high parts of 64-bit FP values
	"F0",
	"F2",
	"F4",
	"F6",
	"F8",
	"F10",
	"F12",
	"F14",
	"F16",
	"F18",
	"F20",
	"F22",
	"F24",
	"F26",
	"F28",
	"F30",

	"HI", // high bits of multiplication
	"LO", // low bits of multiplication

Examples:

	FCCMPD AL, F8, F26, $0     <=>    fccmp d26, d8, #0x0, al
	FCCMPS VS, F29, F4, $4     <=>    fccmp s4, s29, #0x4, vs
	FCCMPED LE, F20, F5, $13   <=>    fccmpe d5, d20, #0xd, le
	FCCMPES NE, F26, F10, $0   <=>    fccmpe s10, s26, #0x0, ne

(6) CCMN, CCMNW, CCMP, CCMPW <cond>, <Rn>, $<imm>, $<nzcv>

Examples:

	CCMP MI, R22, $12, $13     <=>    ccmp x22, #0xc, #0xd, mi

	i9 = y                  // make y escape so the line above has to call convT
	return x != y
}

// liveness formerly confused by UNDEF followed by RET,
// leading to "live at entry to f10: ~r1" (unnamed result).

func f10() string {
	panic(1)
}

// liveness formerly confused by select, thinking runtime.selectgo
// can return to next instruction; it always jumps elsewhere.

		// Integer parameters passed in register X10-X17, X8-X9, X18-X23
		ParamIntRegNames: "X10 X11 X12 X13 X14 X15 X16 X17 X8 X9 X18 X19 X20 X21 X22 X23",
		// Float parameters passed in register F10-F17, F8-F9, F18-F23
		ParamFloatRegNames: "F10 F11 F12 F13 F14 F15 F16 F17 F8 F9 F18 F19 F20 F21 F22 F23",
	})

	MOV	X17, (7*8)(X25)
	MOV	X8,  (8*8)(X25)
	MOV	X9,  (9*8)(X25)
	MOV	X18, (10*8)(X25)
	MOV	X19, (11*8)(X25)
	MOV	X20, (12*8)(X25)
	MOV	X21, (13*8)(X25)
	MOV	X22, (14*8)(X25)
	MOV	X23, (15*8)(X25)
	MOVD	F10, (16*8)(X25)
	MOVD	F11, (17*8)(X25)
	MOVD	F12, (18*8)(X25)
	MOVD	F13, (19*8)(X25)
	MOVD	F14, (20*8)(X25)
	MOVD	F15, (21*8)(X25)
	MOVD	F16, (22*8)(X25)
	MOVD	F17, (23*8)(X25)
	MOVD	F8,  (24*8)(X25)

	STMG	R6, R15, 48(R15)

	// Allocate 80 bytes on the stack.
	MOVD	$-80(R15), R15

	// Save F8-F15 in our stack frame.
	FMOVD	F8, 16(R15)
	FMOVD	F9, 24(R15)
	FMOVD	F10, 32(R15)
	FMOVD	F11, 40(R15)
	FMOVD	F12, 48(R15)
	FMOVD	F13, 56(R15)
	FMOVD	F14, 64(R15)
	FMOVD	F15, 72(R15)

	// Synchronous initialization.
	MOVD	$runtime·libpreinit(SB), R1
	BL	R1

	MOVD	F2, (18*8)(R25)
	MOVD	F3, (19*8)(R25)
	MOVD	F4, (20*8)(R25)
	MOVD	F5, (21*8)(R25)
	MOVD	F6, (22*8)(R25)
	MOVD	F7, (23*8)(R25)
	MOVD	F8, (24*8)(R25)
	MOVD	F9, (25*8)(R25)
	MOVD	F10, (26*8)(R25)
	MOVD	F11, (27*8)(R25)
	MOVD	F12, (28*8)(R25)
	MOVD	F13, (29*8)(R25)
	MOVD	F14, (30*8)(R25)
	MOVD	F15, (31*8)(R25)
	RET

	"R29",
	"g",   // REGG.  Using name "g" and setting Config.hasGReg makes it "just happen".
	"R31", // REGTMP

	"F0",
	"F1",
	"F2",
	"F3",
	"F4",
	"F5",
	"F6",
	"F7",
	"F8",
	"F9",
	"F10",
	"F11",
	"F12",
	"F13",
	"F14",
	"F15",
	"F16",
	"F17",
	"F18",
	"F19",
	"F20",
	"F21",
	"F22",
	"F23",
	"F24",
	"F25",
	"F26",
	"F27",
	"F28",
	"F29",
	"F30",

        IN 14: R{ F6 } spilloffset: 64 typ: float64
        IN 15: R{ F7 } spilloffset: 72 typ: float64
        IN 16: R{ F8 F9 } spilloffset: 80 typ: complex128
        IN 17: R{ F10 F11 } spilloffset: 96 typ: complex128
        IN 18: R{ F12 F13 } spilloffset: 112 typ: complex128
        IN 19: R{ } offset: 0 typ: complex128
        IN 20: R{ } offset: 16 typ: complex64

	FADDS	F0, F15                // b30a00f0
	FADD	F1, F14                // b31a00e1
	FSUBS	F2, F13                // b30b00d2
	FSUB	F3, F12                // b31b00c3
	FMULS	F4, F11                // b31700b4
	FMUL	F5, F10                // b31c00a5
	FDIVS	F6, F9                 // b30d0096
	FDIV	F7, F8                 // b31d0087
	FABS	F1, F2                 // b3100021
	FSQRTS	F3, F4                 // b3140043