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Results 151 - 160 of 302 for r8 (0.02 sec)
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src/cmd/vendor/golang.org/x/arch/x86/x86asm/plan9x.go
EBX: "BX", ESP: "SP", EBP: "BP", ESI: "SI", EDI: "DI", R8L: "R8", R9L: "R9", R10L: "R10", R11L: "R11", R12L: "R12", R13L: "R13", R14L: "R14", R15L: "R15", RAX: "AX", RCX: "CX", RDX: "DX", RBX: "BX", RSP: "SP", RBP: "BP", RSI: "SI", RDI: "DI", R8: "R8", R9: "R9", R10: "R10", R11: "R11", R12: "R12", R13: "R13",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Jul 12 20:38:21 UTC 2023 - 7.2K bytes - Viewed (0) -
src/internal/chacha8rand/chacha8_amd64.s
MOVL CX, 0(SP) INCL CX MOVL CX, 4(SP) INCL CX MOVL CX, 8(SP) INCL CX MOVL CX, 12(SP) MOVOU 0(SP), X12 // Load seed words into next two rows and into DI, SI, R8..R13 SEED(0, DI, X4) SEED(1, SI, X5) SEED(2, R8, X6) SEED(3, R9, X7) SEED(4, R10, X8) SEED(5, R11, X9) SEED(6, R12, X10) SEED(7, R13, X11) // Zeros for remaining two matrix entries.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Dec 05 20:34:30 UTC 2023 - 4.6K bytes - Viewed (0) -
src/runtime/memmove_arm.s
AND.S $3, FROM, TMP BNE _funaligned SUB $31, TE, TMP /* do 32-byte chunks if possible */ MOVW TE, savedte-4(SP) _f32loop: CMP TMP, TS BHS _f4tail MOVM.IA.W (FROM), [R1-R8] MOVM.IA.W [R1-R8], (TS) B _f32loop _f4tail: MOVW savedte-4(SP), TE SUB $3, TE, TMP /* do remaining words if possible */ _f4loop: CMP TMP, TS BHS _f1tail
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Jun 04 07:25:06 UTC 2020 - 5.9K bytes - Viewed (0) -
src/crypto/internal/boring/build-goboring.sh
.globl __umodti3 __umodti3: # specialized to u128 % u64, so verify that test %rcx,%rcx jne 1f # save divisor movq %rdx, %r8 # reduce top 64 bits mod divisor movq %rsi, %rax xorl %edx, %edx divq %r8 # reduce full 128-bit mod divisor # quotient fits in 64 bits because top 64 bits have been reduced < divisor.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Jan 26 22:52:27 UTC 2024 - 5.6K bytes - Viewed (0) -
src/syscall/asm_linux_mipsx.s
TEXT ·Syscall9(SB),NOSPLIT,$28-52 NO_LOCAL_POINTERS JAL runtime·entersyscall(SB) MOVW a1+4(FP), R4 MOVW a2+8(FP), R5 MOVW a3+12(FP), R6 MOVW a4+16(FP), R7 MOVW a5+20(FP), R8 MOVW a6+24(FP), R9 MOVW a7+28(FP), R10 MOVW a8+32(FP), R11 MOVW R8, 16(R29) MOVW R9, 20(R29) MOVW R10, 24(R29) MOVW R11, 28(R29) MOVW trap+0(FP), R2 // syscall entry MOVW R0, R3 // reset R3 to zero as 1-ret SYSCALL keeps it SYSCALL
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Sep 07 19:11:15 UTC 2023 - 1.7K bytes - Viewed (0) -
src/math/asin_s390x.s
FMOVD F0, F8 SRAD $32, R7 WORD $0xC0193FE6 //iilf %r1,1072079005 BYTE $0xA0 BYTE $0x9D WORD $0xB91700C7 //llgtr %r12,%r7 MOVW R12, R8 MOVW R1, R6 CMPBGT R8, R6, L2 WORD $0xC0193BFF //iilf %r1,1006632959 BYTE $0xFF BYTE $0xFF MOVW R1, R6 CMPBGT R8, R6, L13 L3: FMOVD 216(R9), F0 FMADD F0, F8, F8 L1: FMOVD F8, ret+8(FP) RET L2: WORD $0xC0193FEF //iilf %r1,1072693247 BYTE $0xFF
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Aug 20 17:42:08 UTC 2018 - 4.2K bytes - Viewed (0) -
src/runtime/preempt_mips64x.s
TEXT ·asyncPreempt(SB),NOSPLIT|NOFRAME,$0-0 MOVV R31, -488(R29) SUBV $488, R29 MOVV R1, 8(R29) MOVV R2, 16(R29) MOVV R3, 24(R29) MOVV R4, 32(R29) MOVV R5, 40(R29) MOVV R6, 48(R29) MOVV R7, 56(R29) MOVV R8, 64(R29) MOVV R9, 72(R29) MOVV R10, 80(R29) MOVV R11, 88(R29) MOVV R12, 96(R29) MOVV R13, 104(R29) MOVV R14, 112(R29) MOVV R15, 120(R29) MOVV R16, 128(R29) MOVV R17, 136(R29) MOVV R18, 144(R29)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat Nov 06 10:24:44 UTC 2021 - 2.7K bytes - Viewed (0) -
src/runtime/signal_mipsx.go
print("r2 ", hex(c.r2()), "\t") print("r3 ", hex(c.r3()), "\n") print("r4 ", hex(c.r4()), "\t") print("r5 ", hex(c.r5()), "\n") print("r6 ", hex(c.r6()), "\t") print("r7 ", hex(c.r7()), "\n") print("r8 ", hex(c.r8()), "\t") print("r9 ", hex(c.r9()), "\n") print("r10 ", hex(c.r10()), "\t") print("r11 ", hex(c.r11()), "\n") print("r12 ", hex(c.r12()), "\t") print("r13 ", hex(c.r13()), "\n")
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 28 18:17:57 UTC 2021 - 3.1K bytes - Viewed (0) -
src/runtime/cgo/asm_arm.s
// The C arguments arrive in R0, R1, R2, and R3. We want to // pass R0, R1, and R3 to Go, so we push those on the stack. // Also, save C callee-save registers R4-R12. MOVM.WP [R0, R1, R3, R4, R5, R6, R7, R8, R9, g, R11, R12], (R13) // Finally, save the link register R14. This also puts the // arguments we pushed for cgocallback where they need to be, // starting at 4(R13). MOVW.W R14, -4(R13)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 2.2K bytes - Viewed (0) -
src/runtime/libfuzzer_amd64.s
//go:build libfuzzer #include "go_asm.h" #include "go_tls.h" #include "textflag.h" // Based on race_amd64.s; see commentary there. #ifdef GOOS_windows #define RARG0 CX #define RARG1 DX #define RARG2 R8 #define RARG3 R9 #else #define RARG0 DI #define RARG1 SI #define RARG2 DX #define RARG3 CX #endif // void runtime·libfuzzerCall4(fn, hookId int, s1, s2 unsafe.Pointer, result uintptr)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 10 04:57:07 UTC 2023 - 5K bytes - Viewed (0)