_ = 0xabci // ERROR "hexadecimal floating-point"
	_ = 0x0p1i // ERROR "hexadecimal floating-point"
)

// signed shift counts
var (
	s int
	_ = 1 << s // ERROR "invalid operation: signed shift count s (variable of type int) requires go1.13 or later"
	_ = 1 >> s // ERROR "signed shift count"

	const PI4 = Pi / 4
	if x < PI4 {
		return 0, x
	}
	// Extract out the integer and exponent such that,
	// x = ix * 2 ** exp.
	ix := Float64bits(x)
	exp := int(ix>>shift&mask) - bias - shift
	ix &^= mask << shift
	ix |= 1 << shift
	// Use the exponent to extract the 3 appropriate uint64 digits from mPi4,
	// B ~ (z0, z1, z2), such that the product leading digit has the exponent -61.

	MOVM.IA (Rc0), [Ra,Rb,Rc,Rd]

// a += (((c^d)&b)^d) + X[index] + const
// a = a<<shift | a>>(32-shift) + b
#define ROUND1(Ra, Rb, Rc, Rd, index, shift, Rconst) \
	EOR	Rc, Rd, Rt0		; \
	AND	Rb, Rt0			; \
	EOR	Rd, Rt0			; \
	MOVW	(index<<2)(Rdata), Rt1	; \
	ADD	Rt1, Rt0			; \
	ADD	Rconst, Rt0			; \
	ADD	Rt0, Ra			; \
	ADD	Ra@>(32-shift), Rb, Ra	;

	MOVM.IA.W (Rtable), [Rc0,Rc1,Rc2,Rc3]
	ROUND1(Ra, Rb, Rc, Rd,  0,	7, Rc0)

		return x
	case x < 0:
		return NaN()
	}
	ix := Float64bits(x)
	// normalize x
	exp := int((ix >> shift) & mask)
	if exp == 0 { // subnormal x
		for ix&(1<<shift) == 0 {
			ix <<= 1
			exp--
		}
		exp++
	}
	exp -= bias // unbias exponent
	ix &^= mask << shift
	ix |= 1 << shift
	if exp&1 == 1 { // odd exp, double x to make it even
		ix <<= 1
	}

		{name: "SRW", argLength: 2, reg: sh21, asm: "SRW"},                    // unsigned uint32(arg0) >> arg1, shift amount is mod 64
		{name: "SRDconst", argLength: 1, reg: gp11, asm: "SRD", aux: "UInt8"}, // unsigned arg0 >> auxint, shift amount 0-63
		{name: "SRWconst", argLength: 1, reg: gp11, asm: "SRW", aux: "UInt8"}, // unsigned uint32(arg0) >> auxint, shift amount 0-31

		// Arithmetic shifts clobber flags.

(Rsh16x(64|32|16|8)  x y) && shiftIsBounded(v) => (SRAD (MOVHreg x) y)
(Rsh8x(64|32|16|8)   x y) && shiftIsBounded(v) => (SRAD (MOVBreg x) y)

// Unbounded shifts. Go shifts saturate to 0 or -1 when shifting beyond the number of
// bits in a type, PPC64 shifts do not (see the ISA for details).
//
// Note, y is always non-negative.
//

    val sink = sink()
    val bitCount = 64 - java.lang.Long.numberOfLeadingZeros(v)
    val byteCount = (bitCount + 6) / 7
    for (shift in (byteCount - 1) * 7 downTo 0 step 7) {
      val lastBit = if (shift == 0) 0 else 0b1000_0000
      sink.writeByte(((v shr shift) and 0b0111_1111).toInt() or lastBit)
    }
  }

  override fun toString(): String = path.joinToString(separator = " / ")

// Use of this source code is governed by a BSD-style
// license that can be found in the LICENSE file.

package main

func shift(x int) int { return 1 << (1 << (1 << (uint(x)))) }

func main() {
	if n := shift(2); n != 1<<(1<<(1<<2)) {
		println("bad shift", n)
		panic("fail")
	}

	switch {
	case f == 0:
		return f, 0 // correctly return -0
	case IsInf(f, 0) || IsNaN(f):
		return f, 0
	}
	f, exp = normalize(f)
	x := Float64bits(f)
	exp += int((x>>shift)&mask) - bias + 1
	x &^= mask << shift
	x |= (-1 + bias) << shift
	frac = Float64frombits(x)
	return

	ORL	DI,		BP; \
	MOVL	(index*4)(SI),DI; \
	ADDL	BP,		a; \
	ROLL	$shift,	a; \
	ADDL	b,		a

#define ROUND3(a, b, c, d, index, const, shift) \
	LEAL	const(a)(DI*1),a; \
	MOVL	(index*4)(SI),DI; \
	XORL	d,		BP; \
	XORL	b,		BP; \
	ADDL	BP,		a; \
	ROLL	$shift,		a; \
	MOVL	b,		BP; \
	ADDL	b,		a

#define ROUND4(a, b, c, d, index, const, shift) \
	LEAL	const(a)(DI*1),a; \
	ORL	b,		BP; \
	XORL	c,		BP; \