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Results 101 - 110 of 225 for MOVW (0.08 sec)
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src/cmd/cgo/internal/test/issue9400/asm_loong64.s
// will clobber the test pattern created by the caller ADDV $(1024*8), R3 // Ask signaller to setgid MOVW $1, R12 DBAR MOVW R12, ·Baton(SB) DBAR // Wait for setgid completion loop: DBAR MOVW ·Baton(SB), R12 OR R13, R13, R13 // hint that we're in a spin loop BNE R12, loop DBAR // Restore stack ADDV $(-1024*8), R3
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 12 12:00:02 UTC 2023 - 633 bytes - Viewed (0) -
src/runtime/memmove_plan9_amd64.s
SUBQ BX, SI JMP tail move_1or2: MOVB (SI), AX MOVB -1(SI)(BX*1), CX MOVB AX, (DI) MOVB CX, -1(DI)(BX*1) RET move_0: RET move_3or4: MOVW (SI), AX MOVW -2(SI)(BX*1), CX MOVW AX, (DI) MOVW CX, -2(DI)(BX*1) RET move_5through7: MOVL (SI), AX MOVL -4(SI)(BX*1), CX MOVL AX, (DI) MOVL CX, -4(DI)(BX*1) RET move_8:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Jun 04 07:25:06 UTC 2020 - 3K bytes - Viewed (0) -
src/internal/bytealg/index_amd64.s
CMPQ DX, $16 JAE sse42 no_sse42: CMPQ AX, $2 JA _3_or_more MOVW (R8), R8 LEAQ -1(DI)(DX*1), DX PCALIGN $16 loop2: MOVW (DI), SI CMPW SI,R8 JZ success ADDQ $1,DI CMPQ DI,DX JB loop2 JMP fail _3_or_more: CMPQ AX, $3 JA _4_or_more MOVW 1(R8), BX MOVW (R8), R8 LEAQ -2(DI)(DX*1), DX loop3: MOVW (DI), SI CMPW SI,R8 JZ partial_success3 ADDQ $1,DI CMPQ DI,DX
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Aug 07 00:20:48 UTC 2023 - 5.1K bytes - Viewed (0) -
src/runtime/rt0_linux_mipsx.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat Nov 06 10:24:44 UTC 2021 - 797 bytes - Viewed (0) -
test/codegen/noextend.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Dec 14 17:22:18 UTC 2023 - 5.4K bytes - Viewed (0) -
src/math/atanh_s390x.s
WORD $0xC0393FEF //iilf %r3,1072693247 BYTE $0xFF BYTE $0xFF SRAD $32, R1 WORD $0xB9170021 //llgtr %r2,%r1 MOVW R2, R6 MOVW R3, R7 CMPBGT R6, R7, L2 WORD $0xC0392FFF //iilf %r3,805306367 BYTE $0xFF BYTE $0xFF MOVW R2, R6 MOVW R3, R7 CMPBGT R6, R7, L9 L3: FMOVD 144(R5), F2 FMADD F2, F0, F0 L1: FMOVD F0, ret+8(FP) RET L2:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 23 20:52:57 UTC 2023 - 5.1K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/sys/unix/asm_zos_s390x.s
BL runtime·save_g(SB) // Save g and stack pointer MOVW PSALAA, R8 MOVD LCA64(R8), R8 MOVD SAVSTACK_ASYNC(R8), R9 MOVD R15, 0(R9) MOVD argv+8(FP), R1 // Move function arguments into registers MOVD dsa+16(FP), g MOVD fnptr+0(FP), R15 BYTE $0x0D // Branch to function BYTE $0xEF BL runtime·load_g(SB) // Restore g and stack pointer MOVW PSALAA, R8 MOVD LCA64(R8), R8 MOVD SAVSTACK_ASYNC(R8), R9
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 08 16:12:58 UTC 2024 - 11.2K bytes - Viewed (0) -
src/math/tanh_s390x.s
WORD $0xA7183ECF //lhi %r1,16079 WFMADB V0, V2, V5, V2 FMUL F6, F2 MOVW R2, R10 MOVW R1, R11 CMPBLE R10, R11, L16 FMOVD F6, F0 WORD $0xED005010 //adb %f0,.L28-.L18(%r5) BYTE $0x00 BYTE $0x1A WORD $0xA7184330 //lhi %r1,17200 FADD F2, F0 MOVW R2, R10 MOVW R1, R11 CMPBGT R10, R11, L17 WORD $0xED605010 //sdb %f6,.L28-.L18(%r5)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 16 15:34:41 UTC 2019 - 4.6K bytes - Viewed (0) -
src/runtime/mkpreempt.go
} l.add("MOVW", reg, 4) } // Add flag register. l.addSpecial( "MOVW CPSR, R0\nMOVW R0, %d(R13)", "MOVW %d(R13), R0\nMOVW R0, CPSR", 4) // Add floating point registers F0-F15 and flag register. var lfp = layout{stack: l.stack, sp: "R13"} lfp.addSpecial( "MOVW FPCR, R0\nMOVW R0, %d(R13)", "MOVW %d(R13), R0\nMOVW R0, FPCR", 4)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 15.3K bytes - Viewed (0) -
src/math/atan_s390x.s
FMOVD $(0.0), F1 FCMPU F0, F1 BEQ atanIsZero MOVD $·atanrodataL8<>+0(SB), R5 MOVH $0x3FE0, R3 LGDR F0, R1 RISBGNZ $32, $63, $32, R1, R1 RLL $16, R1, R2 ANDW $0x7FF0, R2 MOVW R2, R6 MOVW R3, R7 CMPUBLE R6, R7, L6 MOVD $·atanxmone<>+0(SB), R3 FMOVD 0(R3), F2 WFDDB V0, V2, V0 RISBGZ $63, $63, $33, R1, R1 MOVD $·atanxpi2h<>+0(SB), R3 MOVWZ R1, R1 SLD $3, R1, R1
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 16 15:34:41 UTC 2019 - 3.7K bytes - Viewed (0)