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Results 1 - 7 of 7 for RegList (0.12 sec)
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src/cmd/vendor/golang.org/x/arch/arm/armasm/inst.go
func (RegX) IsArg() {} func (r RegX) String() string { return fmt.Sprintf("%s[%d]", r.Reg, r.Index) } // A RegList is a register list. // Bits at indexes x = 0 through 15 indicate whether the corresponding Rx register is in the list. type RegList uint16 func (RegList) IsArg() {} func (r RegList) String() string { var buf bytes.Buffer fmt.Fprintf(&buf, "{") sep := "" for i := 0; i < 16; i++ {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Nov 29 22:23:32 UTC 2017 - 7.5K bytes - Viewed (0) -
src/cmd/internal/obj/arm/anames5.go
// Use of this source code is governed by a BSD-style // license that can be found in the LICENSE file. package arm var cnames5 = []string{ "NONE", "REG", "REGREG", "REGREG2", "REGLIST", "SHIFT", "SHIFTADDR", "FREG", "PSR", "FCR", "SPR", "RCON", "NCON", "RCON2A", "RCON2S", "SCON", "LCON", "LCONADDR", "ZFCON", "SFCON", "LFCON", "RACON",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 27 19:54:44 UTC 2018 - 1.3K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/arm/armasm/gnu.go
if argIndex == 0 { return fmt.Sprintf("r%d", int32(arg)) } } switch arg { case R10: return "sl" case R11: return "fp" case R12: return "ip" } case RegList: var buf bytes.Buffer fmt.Fprintf(&buf, "{") sep := "" for i := 0; i < 16; i++ { if arg&(1<<uint(i)) != 0 { fmt.Fprintf(&buf, "%s%s", sep, gnuArg(inst, -1, Reg(i))) sep = ", " }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat May 14 17:21:52 UTC 2016 - 3.5K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/arm/armasm/decode.go
case arg_registers: return RegList(x & (1<<16 - 1)) case arg_registers2: x &= 1<<16 - 1 n := 0 for i := 0; i < 16; i++ { if x>>uint(i)&1 != 0 { n++ } } if n < 2 { return nil } return RegList(x) case arg_registers1: Rt := (x >> 12) & (1<<4 - 1) return RegList(1 << Rt) case arg_satimm4:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 22 17:16:14 UTC 2022 - 12.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/regalloc.go
v := s.regs[r].v if v == nil { continue } k++ } regList := make([]endReg, 0, k) for r := register(0); r < s.numRegs; r++ { v := s.regs[r].v if v == nil { continue } regList = append(regList, endReg{r, v, s.regs[r].c}) } s.endRegs[b.ID] = regList if checkEnabled { regValLiveSet.clear() for _, x := range s.live[b.ID] {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 17:49:56 UTC 2023 - 87.2K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/arm/armasm/plan9x.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:33 UTC 2023 - 11.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm.s
// // MOVM // // LTYPE8 cond ioreg ',' '[' reglist ']' // { // var g obj.Addr // // g = nullgen; // g.Type = obj.TYPE_CONST; // g.Offset = int64($6); // outcode($1, $2, &$3, 0, &g); // } MOVM 0(R1), [R2,R5,R8,g] // MOVM (R1), [R2,R5,R8,g] MOVM (R1), [R2-R5] // MOVM (R1), [R2,R3,R4,R5] MOVM (R1), [R2] // LTYPE8 cond '[' reglist ']' ',' ioreg // { // var g obj.Addr //
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Dec 15 20:51:01 UTC 2023 - 69K bytes - Viewed (0)