{"R20", "R20"},
	{"R21", "R21"},
	{"R22", "R22"},
	{"R23", "R23"},
	{"R24", "R24"},
	{"R25", "R25"},
	{"R26", "R26"},
	{"R27", "R27"},
	{"R28", "R28"},
	{"R29", "R29"},
	{"R3", "R3"},
	{"R31", "R31"},
	{"R4", "R4"},
	{"R5", "R5"},
	{"R6", "R6"},
	{"R7", "R7"},
	{"R8", "R8"},
	{"R9", "R9"},
	{"SPR(269)", "SPR(269)"},
	{"a(FP)", "a(FP)"},
	{"g", "g"},
	{"ret+8(FP)", "ret+8(FP)"},

	VMOVH	-70(R12), W3   // 7bdd60e1
	VMOVW	(R3), W31      // 78001fe2
	VMOVW	64(R20), W16   // 7810a422
	VMOVW	-104(R17), W24 // 7be68e22
	VMOVD	(R3), W2       // 780018a3
	VMOVD	128(R23), W19  // 7810bce3
	VMOVD	-256(R31), W0  // 7be0f823

	VMOVB	W8, (R0)       // 78000224
	VMOVB	W0, 511(R3)    // 79ff1824
	VMOVB	W21, -512(R12) // 7a006564
	VMOVH	W12, (R24)     // 7800c325
	VMOVH	W8, 110(R19)   // 78379a25

	VEXTRACTHM V1, R2                       // 10490e42
	VEXTRACTQM V1, R2                       // 104c0e42
	VEXTRACTWM V1, R6                       // 10ca0e42
	VEXTSD2Q V1, V2                         // 105b0e02
	VGNB V1, $1, R31                        // 13e10ccc
	VINSBLX R1, R2, V3                      // 1061120f
	VINSBRX R1, R2, V3                      // 1061130f
	VINSBVLX R1, V1, V2                     // 1041080f

It is a scaled mode as on the x86, but the only scale allowed is <code>1</code>.
</li>

</ul>

<h3 id="mips">MIPS, MIPS64</h3>

<p>
General purpose registers are named <code>R0</code> through <code>R31</code>,
floating point registers are <code>F0</code> through <code>F31</code>.
</p>

<p>
<code>R30</code> is reserved to point to <code>g</code>.
<code>R23</code> is used as a temporary register.
</p>