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Results 1 - 10 of 15 for faultOnNilArg1 (0.4 sec)
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src/cmd/compile/internal/ssa/_gen/386Ops.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 14 08:10:32 UTC 2023 - 45.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/S390XOps.go
{name: "ADDload", argLength: 3, reg: gpopload, asm: "ADD", aux: "SymOff", resultInArg0: true, clobberFlags: true, faultOnNilArg1: true, symEffect: "Read"}, // arg0 + *arg1. arg2=mem {name: "ADDWload", argLength: 3, reg: gpopload, asm: "ADDW", aux: "SymOff", resultInArg0: true, clobberFlags: true, faultOnNilArg1: true, symEffect: "Read"}, // arg0 + *arg1. arg2=mem
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 24 00:21:13 UTC 2023 - 52.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Aug 04 16:40:24 UTC 2023 - 98K bytes - Viewed (1) -
src/cmd/compile/internal/ssa/_gen/main.go
log.Fatalf("faultOnNilArg0 with aux %s not allowed", v.aux) } } if v.faultOnNilArg1 { fmt.Fprintln(w, "faultOnNilArg1: true,") if v.aux != "Sym" && v.aux != "SymOff" && v.aux != "SymValAndOff" && v.aux != "Int64" && v.aux != "Int32" && v.aux != "" { log.Fatalf("faultOnNilArg1 with aux %s not allowed", v.aux) } } if v.hasSideEffects {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Jan 19 22:42:34 UTC 2023 - 16.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64Ops.go
clobberFlags: true, typ: "Mem", faultOnNilArg0: true, faultOnNilArg1: true, unsafePoint: true, }, { name: "LoweredMoveShort", aux: "Int64", argLength: 3, reg: regInfo{ inputs: []regMask{gp, gp}, }, typ: "Mem", faultOnNilArg0: true, faultOnNilArg1: true, unsafePoint: true, },
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 43.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/nilcheck.go
ptrs := ptrstore[:0] if opcodeTable[v.Op].faultOnNilArg0 && (faultOnLoad || v.Type.IsMemory()) { // On AIX, only writing will fault. ptrs = append(ptrs, v.Args[0]) } if opcodeTable[v.Op].faultOnNilArg1 && (faultOnLoad || (v.Type.IsMemory() && v.Op != OpPPC64LoweredMove)) { // On AIX, only writing will fault.
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Oct 31 20:45:54 UTC 2023 - 11.3K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/LOONG64Ops.go
argLength: 3, reg: regInfo{ inputs: []regMask{buildReg("R21"), buildReg("R20")}, clobbers: buildReg("R20 R21 R1"), }, typ: "Mem", faultOnNilArg0: true, faultOnNilArg1: true, }, // large or unaligned zeroing // arg0 = address of memory to zero (in R20, changed as side effect) // arg1 = address of the last element to zero // arg2 = mem // auxint = alignment
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 21 19:04:19 UTC 2023 - 25.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/MIPS64Ops.go
aux: "Int64", argLength: 3, reg: regInfo{ inputs: []regMask{buildReg("R2"), buildReg("R1")}, clobbers: buildReg("R1 R2 R31"), }, faultOnNilArg0: true, faultOnNilArg1: true, }, // large or unaligned zeroing // arg0 = address of memory to zero (in R1, changed as side effect) // arg1 = address of the last element to zero // arg2 = mem // auxint = alignment
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 03:36:31 UTC 2023 - 25.5K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/RISCV64Ops.go
reg: regInfo{ inputs: []regMask{regNamed["X25"], regNamed["X24"]}, clobbers: regNamed["X1"] | regNamed["X24"] | regNamed["X25"], }, typ: "Mem", faultOnNilArg0: true, faultOnNilArg1: true, }, // Generic moves and zeros // general unaligned zeroing // arg0 = address of memory to zero (in X5, changed as side effect) // arg1 = address of the last element to zero (inclusive)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 14:57:07 UTC 2024 - 30.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
argLen: 3, clobberFlags: true, faultOnNilArg0: true, faultOnNilArg1: true, reg: regInfo{ inputs: []inputInfo{ {0, 128}, // DI {1, 64}, // SI }, clobbers: 194, // CX SI DI }, }, { name: "REPMOVSL", argLen: 4, faultOnNilArg0: true, faultOnNilArg1: true, reg: regInfo{ inputs: []inputInfo{ {0, 128}, // DI
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0)