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Results 1 - 4 of 4 for f20 (0.05 sec)
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src/cmd/compile/internal/ssa/opGen.go
{1, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 }, outputs: []outputInfo{ {0, 9223372034707292160}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 },
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64Ops.go
"F0", "F1", "F2", "F3", "F4", "F5", "F6", "F7", "F8", "F9", "F10", "F11", "F12", "F13", "F14", "F15", "F16", "F17", "F18", "F19", "F20", "F21", "F22", "F23", "F24", "F25", "F26", "F27", "F28", "F29", "F30", // "F31", the allocator is limited to 64 entries. We sacrifice this FPR to support XER. "XER",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 43.8K bytes - Viewed (0) -
src/runtime/asm_ppc64x.s
// R0 holds the LR of the caller's caller, R1 holds save location FMOVD F14, -144(R1) FMOVD F15, -136(R1) FMOVD F16, -128(R1) FMOVD F17, -120(R1) FMOVD F18, -112(R1) FMOVD F19, -104(R1) FMOVD F20, -96(R1) FMOVD F21, -88(R1) FMOVD F22, -80(R1) FMOVD F23, -72(R1) FMOVD F24, -64(R1) FMOVD F25, -56(R1) FMOVD F26, -48(R1) FMOVD F27, -40(R1) FMOVD F28, -32(R1) FMOVD F29, -24(R1)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 18:17:17 UTC 2024 - 45.4K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64Ops.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 58.8K bytes - Viewed (0)