return opstr[o]
}

// An Arg is a single instruction argument, one of these types: Reg, CondReg, SpReg, Imm, PCRel, Label, or Offset.
type Arg interface {
	IsArg()
	String() string
}

// An Args holds the instruction arguments.
// If an instruction has fewer than 6 arguments,
// the final elements in the array are nil.
type Args [6]Arg

// A Reg is a single register. The zero value means R0, not the absence of a register.

        when:
        def ref1 = factory.open(tmpDir.testDirectory, null, [prop: 'value'], mode(Exclusive), null, null)
        def ref2 = factory.open(tmpDir.testDirectory, null, [prop: 'value'], mode(Exclusive), null, null)

        then:
        ref1.reference.cache.is(ref2.reference.cache)

        and:
        1 * opened.accept(_)
        0 * opened._

        cleanup:
        factory.close()
    }

    protected void setUp() throws Exception {
        file1 = File.createTempFile("kuromoji_", ".txt");
        FileUtil.write(
                file1.getAbsolutePath(),
                "token1,seg1,reading1,pos1\ntoken2,seg2,reading2,pos2\ntoken3,seg3,reading3,pos3"
                        .getBytes(Constants.UTF_8));
    }

    @Override
    protected void tearDown() throws Exception {
        file1.delete();
    }
    */

}

func GetInformerFiltered[T runtime.Object](c ClientGetter, opts ktypes.InformerOptions) informerfactory.StartableInformer {
	reg := typemap.Get[TypeRegistration[T]](registerTypes)
	if reg != nil {
		// This is registered type
		tr := *reg
		return c.Informers().InformerFor(tr.GetGVR(), opts, func() cache.SharedIndexInformer {
			inf := cache.NewSharedIndexInformer(
				tr.ListWatch(c, opts),

            .getValue()
            .str();

    return RE2::FullMatch(lifted_func_name, *match_regex_);  // NOLINT
  }

 private:
  // Returns an owned `RE2` object that corresponds to the `spec`. Returns
  // `nullptr` if the `spec` is invalid.
  // NOLINTNEXTLINE - RE2 included via TSL regexp.h
  std::unique_ptr<RE2> GetMatchRegex(const FunctionNameMatcherSpec& spec) {

		return x + 1, y + 1.0
	}
	var args *stackArgs
	var regs abi.RegArgs
	intRegs := regs.Ints[:]
	floatRegs := regs.Floats[:]
	fval := float64(42.0)
	if len(intRegs) > 0 {
		intRegs[0] = 42
		floatRegs[0] = math.Float64bits(fval)
	} else {
		args = &stackArgs{
			x0: 42,
			x1: 42.0,
		}
	}

	if _, err := runtime.InjectDebugCall(g, fn, &regs, args, debugCallTKill, false); err != nil {
		t.Fatal(err)

	"fmt"
)

func init() {
	obj.RegisterRegister(obj.RBaseS390X, REG_R0+1024, rconv)
	obj.RegisterOpcode(obj.ABaseS390X, Anames)
}

func rconv(r int) string {
	if r == 0 {
		return "NONE"
	}
	if r == REGG {
		// Special case.
		return "g"
	}
	if REG_R0 <= r && r <= REG_R15 {
		return fmt.Sprintf("R%d", r-REG_R0)
	}
	if REG_F0 <= r && r <= REG_F15 {
		return fmt.Sprintf("F%d", r-REG_F0)
	}

	REG_F25
	REG_F26
	REG_F27
	REG_F28
	REG_F29
	REG_F30
	REG_F31

	REG_PC_B // also first parameter, i32

	MAXREG

	MINREG  = REG_SP
	REGSP   = REG_SP
	REGCTXT = REG_CTXT
	REGG    = REG_g

// by the CPU correctly.
func (r *RegArgs) IntRegArgAddr(reg int, argSize uintptr) unsafe.Pointer {
	if argSize > goarch.PtrSize || argSize == 0 || argSize&(argSize-1) != 0 {
		panic("invalid argSize")
	}
	offset := uintptr(0)
	if goarch.BigEndian {
		offset = goarch.PtrSize - argSize
	}
	return unsafe.Pointer(uintptr(unsafe.Pointer(&r.Ints[reg])) + offset)
}

// the caller's frame due to issue #43228.
TEXT crosscall2(SB),NOSPLIT|NOFRAME,$0
	// Start with standard C stack frame layout and linkage, allocate
	// 32 bytes of argument space, save callee-save regs, and set R0 to $0.
	STACK_AND_SAVE_HOST_TO_GO_ABI(32)
	// The above will not preserve R2 (TOC). Save it in case Go is
	// compiled without a TOC pointer (e.g -buildmode=default).
	MOVD	R2, 24(R1)

	// Load the current g.