"fmt"
)

func init() {
	obj.RegisterRegister(obj.RBasePPC64, REG_SPR0+1024, rconv)
	// Note, the last entry in Anames is "LASTAOUT", it is not a real opcode.
	obj.RegisterOpcode(obj.ABasePPC64, Anames[:len(Anames)-1])
	obj.RegisterOpcode(AFIRSTGEN, GenAnames)
}

func rconv(r int) string {
	if r == 0 {
		return "NONE"
	}
	if r == REGG {
		// Special case.
		return "g"
	}

// license that can be found in the LICENSE file.

package loong64

import (
	"cmd/internal/obj"
	"fmt"
)

func init() {
	obj.RegisterRegister(obj.RBaseLOONG64, REG_LAST+1, rconv)
	obj.RegisterOpcode(obj.ABaseLoong64, Anames)
}

func rconv(r int) string {
	if r == 0 {
		return "NONE"
	}
	if r == REGG {
		// Special case.
		return "g"
	}
	if REG_R0 <= r && r <= REG_R31 {

// license that can be found in the LICENSE file.

package riscv

import (
	"fmt"

	"cmd/internal/obj"
)

func init() {
	obj.RegisterRegister(obj.RBaseRISCV, REG_END, RegName)
	obj.RegisterOpcode(obj.ABaseRISCV, Anames)
	obj.RegisterOpSuffix("riscv64", opSuffixString)
}

func RegName(r int) string {
	switch {
	case r == 0:
		return "NONE"
	case r == REG_G:
		return "g"
	case r == REG_SP:

// THE SOFTWARE.

package s390x

import (
	"cmd/internal/obj"
	"fmt"
)

func init() {
	obj.RegisterRegister(obj.RBaseS390X, REG_R0+1024, rconv)
	obj.RegisterOpcode(obj.ABaseS390X, Anames)
}

func rconv(r int) string {
	if r == 0 {
		return "NONE"
	}
	if r == REGG {
		// Special case.
		return "g"
	}
	if REG_R0 <= r && r <= REG_R15 {

// THE SOFTWARE.

package mips

import (
	"cmd/internal/obj"
	"fmt"
)

func init() {
	obj.RegisterRegister(obj.RBaseMIPS, REG_LAST+1, rconv)
	obj.RegisterOpcode(obj.ABaseMIPS, Anames)
}

func rconv(r int) string {
	if r == 0 {
		return "NONE"
	}
	if r == REGG {
		// Special case.
		return "g"
	}
	if REG_R0 <= r && r <= REG_R31 {

	"TR2",
	"TR3",
	"TR4",
	"TR5",
	"TR6",
	"TR7",
	"TLS",    // [D_TLS]
	"MAXREG", // [MAXREG]
}

func init() {
	obj.RegisterRegister(REG_AL, REG_AL+len(Register), rconv)
	obj.RegisterOpcode(obj.ABaseAMD64, Anames)
	obj.RegisterRegisterList(obj.RegListX86Lo, obj.RegListX86Hi, rlconv)
	obj.RegisterOpSuffix("386", opSuffixString)
	obj.RegisterOpSuffix("amd64", opSuffixString)
}

// THE SOFTWARE.

package arm

import (
	"cmd/internal/obj"
	"fmt"
)

func init() {
	obj.RegisterRegister(obj.RBaseARM, MAXREG, rconv)
	obj.RegisterOpcode(obj.ABaseARM, Anames)
	obj.RegisterRegisterList(obj.RegListARMLo, obj.RegListARMHi, rlconv)
	obj.RegisterOpSuffix("arm", obj.CConvARM)
}

func rconv(r int) string {
	if r == 0 {
		return "NONE"
	}

	"MI",
	"PL",
	"VS",
	"VC",
	"HI",
	"LS",
	"GE",
	"LT",
	"GT",
	"LE",
	"AL",
	"NV",
}

func init() {
	obj.RegisterRegister(obj.RBaseARM64, REG_SPECIAL+1024, rconv)
	obj.RegisterOpcode(obj.ABaseARM64, Anames)
	obj.RegisterRegisterList(obj.RegListARM64Lo, obj.RegListARM64Hi, rlconv)
	obj.RegisterOpSuffix("arm64", obj.CConvARM)
	obj.RegisterSpecialOperands(int64(SPOP_BEGIN), int64(SPOP_END), SPCconv)
}

}

type opSet struct {
	lo    As
	names []string
}

// Not even worth sorting
var aSpace []opSet

// RegisterOpcode binds a list of instruction names
// to a given instruction number range.
func RegisterOpcode(lo As, Anames []string) {
	if len(Anames) > AllowedOpCodes {
		panic(fmt.Sprintf("too many instructions, have %d max %d", len(Anames), AllowedOpCodes))
	}

	"F28": REG_F28,
	"F29": REG_F29,
	"F30": REG_F30,
	"F31": REG_F31,

	"PC_B": REG_PC_B,
}

var registerNames []string

func init() {
	obj.RegisterRegister(MINREG, MAXREG, rconv)
	obj.RegisterOpcode(obj.ABaseWasm, Anames)

	registerNames = make([]string, MAXREG-MINREG)
	for name, reg := range Register {
		registerNames[reg-MINREG] = name
	}
}

func rconv(r int) string {
	return registerNames[r-MINREG]