STXVRHX VS2, (R1)(R2)                   // 7c42095a
	STXVRWX VS2, (R1)(R2)                   // 7c42099a
	VCFUGED V1, V2, V3                      // 1061154d
	VCLRLB V1, R2, V3                       // 1061118d
	VCLRRB V1, R2, V3                       // 106111cd
	VCLZDM V1, V2, V3                       // 10611784
	VCMPEQUQ V1, V2, V3                     // 106111c7

	"VCNTMBW",
	"VCNTMBH",
	"VCNTMBD",
	"VCNTMBB",
	"VCMPUQ",
	"VCMPSQ",
	"VCMPGTUQCC",
	"VCMPGTUQ",
	"VCMPGTSQCC",
	"VCMPGTSQ",
	"VCMPEQUQCC",
	"VCMPEQUQ",
	"VCLZDM",
	"VCLRRB",
	"VCLRLB",
	"VCFUGED",
	"STXVRWX",
	"STXVRHX",
	"STXVRDX",
	"STXVRBX",
	"STXVPX",
	"STXVP",
	"SETNBCR",
	"SETNBC",
	"SETBCR",
	"SETBC",
	"PEXTD",
	"PDEPD",
	"MTVSRWM",

	"VCEQFS",
	"VCEQGS",
	"VCH",
	"VCHB",
	"VCHH",
	"VCHF",
	"VCHG",
	"VCHBS",
	"VCHHS",
	"VCHFS",
	"VCHGS",
	"VCHL",
	"VCHLB",
	"VCHLH",
	"VCHLF",
	"VCHLG",
	"VCHLBS",
	"VCHLHS",
	"VCHLFS",
	"VCHLGS",
	"VCLZ",
	"VCLZB",
	"VCLZH",
	"VCLZF",
	"VCLZG",
	"VCTZ",
	"VCTZB",
	"VCTZH",
	"VCTZF",
	"VCTZG",
	"VEC",
	"VECB",
	"VECH",
	"VECF",

	STXVPX:         "stxvpx",
	STXVRBX:        "stxvrbx",
	STXVRDX:        "stxvrdx",
	STXVRHX:        "stxvrhx",
	STXVRWX:        "stxvrwx",
	VCFUGED:        "vcfuged",
	VCLRLB:         "vclrlb",
	VCLRRB:         "vclrrb",
	VCLZDM:         "vclzdm",
	VCMPEQUQ:       "vcmpequq",
	VCMPEQUQCC:     "vcmpequq.",
	VCMPGTSQ:       "vcmpgtsq",
	VCMPGTSQCC:     "vcmpgtsq.",
	VCMPGTUQ:       "vcmpgtuq",

	"VPMSUMW",
	"VPMSUMD",
	"VMSUMUDM",
	"VR",
	"VRLB",
	"VRLH",
	"VRLW",
	"VRLD",
	"VS",
	"VSLB",
	"VSLH",
	"VSLW",
	"VSL",
	"VSLO",
	"VSRB",
	"VSRH",
	"VSRW",
	"VSR",
	"VSRO",
	"VSLD",
	"VSRD",
	"VSA",
	"VSRAB",
	"VSRAH",
	"VSRAW",
	"VSRAD",
	"VSOI",
	"VSLDOI",
	"VCLZ",
	"VCLZB",
	"VCLZH",
	"VCLZW",
	"VCLZD",
	"VPOPCNT",

	SRD	$56, R14, R14	// The result of VCNTMBB is shifted. Unshift it.
	ADD	R14, R18, R18
	ADD	$16, R3, R3
	ANDCC	$15, R4, R4

small_tail_p10:
	SLD	$56, R4, R6
	LXVLL	R3, R6, V0
	VCMPEQUB V0, V1, V0
	VCLRRB	V0, R4, V0	// If <16B being compared, clear matches of the 16-R4 bytes.
	VCNTMBB	V0, $1, R14	// Sum the value of bit 0 of each byte of the compare into R14.
	SRD	$56, R14, R14	// The result of VCNTMBB is shifted. Unshift it.

	"LDAXRB",
	"LDAXRH",
	"LDAXRW",
	"LDCLRAB",
	"LDCLRAD",
	"LDCLRAH",
	"LDCLRALB",
	"LDCLRALD",
	"LDCLRALH",
	"LDCLRALW",
	"LDCLRAW",
	"LDCLRB",
	"LDCLRD",
	"LDCLRH",
	"LDCLRLB",
	"LDCLRLD",
	"LDCLRLH",
	"LDCLRLW",
	"LDCLRW",
	"LDEORAB",
	"LDEORAD",
	"LDEORAH",
	"LDEORALB",
	"LDEORALD",
	"LDEORALH",
	"LDEORALW",
	"LDEORAW",
	"LDEORB",
	"LDEORD",

	// Process remaining data chunks
	CMP     R4 ,$16
	BGE     fold_16bytes_loop

final_fold:
	VLEIB   $7, $0x40, V9
	VSRLB   V9, CONST_R4R3, V0
	VLEIG   $0, $1, V0

	VGFMG   V0, V1, V1

	VLEIB   $7, $0x20, V9         // Shift by words
	VSRLB   V9, V1, V2            // Store remaining bits in V2
	VUPLLF  V1, V1                // Split rightmost doubleword

	}

	PC := pc
	// Special handling for some ops
	startArg := 0
	sep := " "
	opName := inst.Op.String()
	argList := inst.Args[:]

	switch opName {
	case "bc", "bcl", "bca", "bcla", "bclr", "bclrl", "bcctr", "bcctrl", "bctar", "bctarl":
		sfx := inst.Op.String()[2:]
		bo := int(inst.Args[0].(Imm))
		bi := inst.Args[1].(CondReg)
		atsfx := [4]string{"", "?", "-", "+"}
		decsfx := [2]string{"dnz", "dz"}

	MOVD counter+64(FP), R7    // R7=counter

	// load BSWAP and J0
	VLM (R1), BSWAP, J0

	// setup
	MOVD  $95, R0
	VLM   (R5), KEY0, KEY1
	VLL   R0, (R6), NONCE
	VZERO M0
	VLEIB $7, $32, M0
	VSRLB M0, NONCE, NONCE

	// initialize counter values
	VLREPF (R7), CTR
	VZERO  INC
	VLEIF  $1, $1, INC
	VLEIF  $2, $2, INC
	VLEIF  $3, $3, INC
	VAF    INC, CTR, CTR
	VREPIF $4, INC

chacha: