// ppc64x/power8:"CMP","ISEL",-"SETBC\tCR0EQ"
	b := x == y
	return b
}
func TestSetNeq64(x uint64, y uint64) bool {
	// ppc64x/power10:"SETBCR\tCR0EQ",-"ISEL"
	// ppc64x/power9:"CMP","ISEL",-"SETBCR\tCR0EQ"
	// ppc64x/power8:"CMP","ISEL",-"SETBCR\tCR0EQ"
	b := x != y
	return b
}
func TestSetLt64(x uint64, y uint64) bool {
	// ppc64x/power10:"SETBC\tCR0GT",-"ISEL"
	// ppc64x/power9:"CMP","ISEL",-"SETBC\tCR0GT"

(ISEL [a] (MOVDconst [0]) y z) => (ISELZ [a^0x4] y z)

// SETBC, SETBCR is supported on ISA 3.1(Power10) and newer, use ISELZ for
// older targets
(SETBC [2] cmp) && buildcfg.GOPPC64 <= 9 => (ISELZ [2] (MOVDconst [1]) cmp)
(SETBCR [2] cmp) && buildcfg.GOPPC64 <= 9 => (ISELZ [6] (MOVDconst [1]) cmp)
(SETBC [0] cmp) && buildcfg.GOPPC64 <= 9 => (ISELZ [0] (MOVDconst [1]) cmp)
(SETBCR [0] cmp) && buildcfg.GOPPC64 <= 9 => (ISELZ [4] (MOVDconst [1]) cmp)

(SETBCR [1] (Flag(LT|EQ))) => (MOVDconst [1])
(SETBCR [2] (FlagEQ)) => (MOVDconst [0])
(SETBCR [2] (Flag(LT|GT))) => (MOVDconst [1])

(SETBC [0] (InvertFlags bool)) => (SETBC [1] bool)
(SETBC [1] (InvertFlags bool)) => (SETBC [0] bool)
(SETBC [2] (InvertFlags bool)) => (SETBC [2] bool)

(SETBCR [0] (InvertFlags bool)) => (SETBCR [1] bool)
(SETBCR [1] (InvertFlags bool)) => (SETBCR [0] bool)

		v.AddArg2(v0, cmp)
		return true
	}
	return false
}
func rewriteValuePPC64latelower_OpPPC64SETBCR(v *Value) bool {
	v_0 := v.Args[0]
	b := v.Block
	typ := &b.Func.Config.Types
	// match: (SETBCR [2] cmp)
	// cond: buildcfg.GOPPC64 <= 9
	// result: (ISELZ [6] (MOVDconst [1]) cmp)
	for {
		if auxIntToInt32(v.AuxInt) != 2 {
			break
		}
		cmp := v_0
		if !(buildcfg.GOPPC64 <= 9) {
			break

		return true
	}
	// match: (SETBCR [2] (FlagGT))
	// result: (MOVDconst [1])
	for {
		if auxIntToInt32(v.AuxInt) != 2 || v_0.Op != OpPPC64FlagGT {
			break
		}
		v.reset(OpPPC64MOVDconst)
		v.AuxInt = int64ToAuxInt(1)
		return true
	}
	// match: (SETBCR [0] (InvertFlags bool))
	// result: (SETBCR [1] bool)
	for {

	PSTXVP VS2, $1, 12345678(R2)            // 041000bcf842614e
	PSTXVP VS62, $0, 5555555(R3)            // 04000054fbe3c563
	SETBC CR2EQ, R2                         // 7c4a0300
	SETBCR CR2LT, R2                        // 7c480340
	SETNBC CR2GT, R2                        // 7c490380
	SETNBCR CR6SO, R2                       // 7c5b03c0
	STXVP VS6, 12352(R5)                    // 18c53041

		// SETBC auxInt values 0=LT 1=GT 2=EQ     (CRbit=1)? 1 : 0
		{name: "SETBC", argLength: 1, reg: crgp, asm: "SETBC", aux: "Int32", typ: "Int32"},
		// SETBCR auxInt values 0=LT 1=GT 2=EQ     (CRbit=1)? 0 : 1
		{name: "SETBCR", argLength: 1, reg: crgp, asm: "SETBCR", aux: "Int32", typ: "Int32"},

		// pseudo-ops
		{name: "Equal", argLength: 1, reg: crgp},         // bool, true flags encode x==y false otherwise.

	"VCMPEQUQCC",
	"VCMPEQUQ",
	"VCLZDM",
	"VCLRRB",
	"VCLRLB",
	"VCFUGED",
	"STXVRWX",
	"STXVRHX",
	"STXVRDX",
	"STXVRBX",
	"STXVPX",
	"STXVP",
	"SETNBCR",
	"SETNBC",
	"SETBCR",
	"SETBC",
	"PEXTD",
	"PDEPD",
	"MTVSRWM",
	"MTVSRQM",
	"MTVSRHM",
	"MTVSRDM",
	"MTVSRBMI",
	"MTVSRBM",
	"LXVRWX",
	"LXVRHX",
	"LXVRDX",
	"LXVRBX",
	"LXVPX",
	"LXVP",

	PSTQ:           "pstq",
	PSTW:           "pstw",
	PSTXSD:         "pstxsd",
	PSTXSSP:        "pstxssp",
	PSTXV:          "pstxv",
	PSTXVP:         "pstxvp",
	SETBC:          "setbc",
	SETBCR:         "setbcr",
	SETNBC:         "setnbc",
	SETNBCR:        "setnbcr",
	STXVP:          "stxvp",
	STXVPX:         "stxvpx",
	STXVRBX:        "stxvrbx",
	STXVRDX:        "stxvrdx",
	STXVRHX:        "stxvrhx",

		reg: regInfo{
			outputs: []outputInfo{
				{0, 1073733624}, // R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29
			},
		},
	},
	{
		name:    "SETBCR",
		auxType: auxInt32,
		argLen:  1,
		asm:     ppc64.ASETBCR,
		reg: regInfo{
			outputs: []outputInfo{