func shlrx32(x, y uint32) uint32 {
	// amd64/v3:"SHRXL"
	s := x >> y
	// amd64/v3:"SHLXL"
	s = s << y
	return s
}

func shlrx64_load(x []uint64, i int, s uint64) uint64 {
	// amd64/v3: `SHRXQ\t[A-Z]+[0-9]*, \([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*8\), [A-Z]+[0-9]*`
	s = x[i] >> i
	// amd64/v3: `SHLXQ\t[A-Z]+[0-9]*, 8\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*8\), [A-Z]+[0-9]*`
	s = x[i+1] << s
	return s
}

		v.AddArg2(x, y)
		return true
	}
	return false
}
func rewriteValueAMD64latelower_OpAMD64SHRL(v *Value) bool {
	v_1 := v.Args[1]
	v_0 := v.Args[0]
	// match: (SHRL x y)
	// cond: buildcfg.GOAMD64 >= 3
	// result: (SHRXL x y)
	for {
		x := v_0
		y := v_1
		if !(buildcfg.GOAMD64 >= 3) {
			break
		}
		v.reset(OpAMD64SHRXL)
		v.AddArg2(x, y)
		return true
	}
	return false
}

	"SHA1MSG1",
	"SHA1MSG2",
	"SHA1NEXTE",
	"SHA1RNDS4",
	"SHA256MSG1",
	"SHA256MSG2",
	"SHA256RNDS2",
	"SHLB",
	"SHLL",
	"SHLQ",
	"SHLW",
	"SHLXL",
	"SHLXQ",
	"SHRB",
	"SHRL",
	"SHRQ",
	"SHRW",
	"SHRXL",
	"SHRXQ",
	"SHUFPD",
	"SHUFPS",
	"SIDT",
	"SLDTL",
	"SLDTQ",
	"SLDTW",
	"SMSWL",
	"SMSWQ",
	"SMSWW",
	"SQRTPD",
	"SQRTPS",
	"SQRTSD",

		"blsiq", "blsil", "blsi",
		"blsmskq", "blsmskl", "blsmsk",
		"blsrq", "blsrl", "blsr",
		"tzcntq", "tzcntl", "tzcnt",
	},
	"bmi2": {
		"sarxq", "sarxl", "sarx",
		"shlxq", "shlxl", "shlx",
		"shrxq", "shrxl", "shrx",
	},
	"sse41": {
		"roundsd",
		"pinsrq", "pinsrl", "pinsrd", "pinsrb", "pinsr",
		"pextrq", "pextrl", "pextrd", "pextrb", "pextr",

		{name: "SARXL", argLength: 2, reg: gp21, asm: "SARXL"}, // signed int32(arg0) >> arg1, shift amount is mod 32
		{name: "SHLXQ", argLength: 2, reg: gp21, asm: "SHLXQ"}, // arg0 << arg1, shift amount is mod 64
		{name: "SHLXL", argLength: 2, reg: gp21, asm: "SHLXL"}, // arg0 << arg1, shift amount is mod 32
		{name: "SHRXQ", argLength: 2, reg: gp21, asm: "SHRXQ"}, // unsigned arg0 >> arg1, shift amount is mod 64

	SHRQ $7, R11, R11                       // 4d0facdb07
	SHRXL R9, (BX), DX                      // c4e233f713
	SHRXL R9, (R11), DX                     // c4c233f713
	SHRXL R9, DX, DX                        // c4e233f7d2
	SHRXL R9, R11, DX                       // c4c233f7d3
	SHRXL R9, (BX), R11                     // c46233f71b
	SHRXL R9, (R11), R11                    // c44233f71b
	SHRXL R9, DX, R11                       // c46233f7da

(MOVLQZX x) && zeroUpper32Bits(x,3)...

	BSRL	CX, CX	// index of highest bit difference
	SHRL	CX, BX	// move a's bit to bottom
	ANDL	$1, BX	// mask bit
	LEAL	-1(BX*2), BX // 1/0 => +1/-1
	MOVL	BX, (AX)
	RET

	// 0-3 bytes in common
small:
	LEAL	(BP*8), CX
	NEGL	CX
	JEQ	allsame

	// load si
	CMPB	SI, $0xfc
	JA	si_high
	MOVL	(SI), SI
	JMP	si_finish
si_high:
	MOVL	-4(SI)(BP*1), SI
	SHRL	CX, SI
si_finish:
	SHLL	CX, SI

si_high:
	// address ends in 111111xx. Load up to bytes we want, move to correct position.
	MOVL	-4(SI)(BX*1), SI
	SHRL	CX, SI
si_finish:

	// same for DI.
	MOVL	DI, DX
	CMPB	DX, $0xfc
	JA	di_high
	MOVL	(DI), DI
	JMP	di_finish
di_high:
	MOVL	-4(DI)(BX*1), DI
	SHRL	CX, DI
di_finish:

	SUBL	SI, DI
	SHLL	CX, DI
equal:
	SETEQ	(AX)

	a := n1 % 32 // unsigned

	// 386:"SHRL",-"IDIVL"
	// amd64:"SHRQ",-"IDIVQ"
	// arm:"SRA",-".*udiv"
	// arm64:"ASR",-"REM"
	// ppc64x:"SRAD"
	b := n2 % 64 // signed

	return a, b
}

// Check that signed divisibility checks get converted to AND on low bits
func Pow2DivisibleSigned(n1, n2 int) (bool, bool) {
	// 386:"TESTL\t[$]63",-"DIVL",-"SHRL"
	// amd64:"TESTQ\t[$]63",-"DIVQ",-"SHRQ"