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src/cmd/asm/internal/asm/testdata/arm64error.s
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Fri Dec 08 03:28:17 GMT 2023 - 37.8K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/armerror.s
MOVB R0>>8, R2 // ERROR "illegal shift" MOVH R0<<16, R2 // ERROR "illegal shift" MOVBS R0->8, R2 // ERROR "illegal shift" MOVHS R0<<24, R2 // ERROR "illegal shift" MOVBU R0->24, R2 // ERROR "illegal shift" MOVHU R0@>1, R2 // ERROR "illegal shift" XTAB R0>>8, R2 // ERROR "illegal shift" XTAH R0<<16, R2 // ERROR "illegal shift"
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Fri Nov 03 14:06:21 GMT 2017 - 14.4K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/mips.s
MOVW R1, M1 // LMOVW mreg ',' rreg // { // outcode(int($1), &$2, 0, &$4); // } MOVW M1, R1 MOVW M1, R1 // // integer operations // logical instructions // shift instructions // unary instructions // // LADDW rreg ',' sreg ',' rreg // { // outcode(int($1), &$2, int($4), &$6); // } ADD R1, R2, R3 // LADDW imm ',' sreg ',' rreg // {
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Tue Aug 08 12:17:12 GMT 2023 - 6.7K bytes - Viewed (0) -
.github/workflows/test-redistribute.yml
- name: Install build dependencies run: pip install build - name: Build source distribution env: TIANGOLO_BUILD_PACKAGE: ${{ matrix.package }} run: python -m build --sdist - name: Decompress source distribution run: | cd dist tar xvf fastapi*.tar.gz - name: Install test dependencies run: | cd dist/fastapi*/
Others - Registered: Sun May 05 07:19:11 GMT 2024 - Last Modified: Tue Apr 30 06:38:13 GMT 2024 - 1.4K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/ppc64.s
// and accept the same constants. MOVW $2147483648, R5 // 64058000 MOVWZ $-2147483648, R5 // 3ca08000 // TODO: These are preprocessed by the assembler into MOVD $const>>shift, R5; SLD $shift, R5. // This only captures the MOVD. Should the SLD be appended to the encoding by the test? // Hex constant 0x20004000000 MOVD $2199090364416, R5 // 60058001 // Hex constant 0xFFFFFE0004000000
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Wed Apr 24 15:53:25 GMT 2024 - 49K bytes - Viewed (0) -
okhttp/src/main/resources/okhttp3/internal/publicsuffix/PublicSuffixDatabase.gz
shiraoi.hokkaido.jp shiraoka.saitama.jp shirataka.yamagata.jp shiriuchi.hokkaido.jp shiroi.chiba.jp shiroishi.miyagi.jp shiroishi.saga.jp shirosato.ibaraki.jp shishikui.tokushima.jp shiso.hyogo.jp shisui.chiba.jp shitara.aichi.jp shiwa.iwate.jp shizukuishi.iwate.jp shizuoka.jp shizuoka.shizuoka.jp shobara.hiroshima.jp shoes shonai.fukuoka.jp shonai.yamagata.jp shoo.okayama.jp shop shop.brendly.rs shop.ht shop.hu shop.pl shop.ro shop.th shoparena.pl shopitsite.com shopping shopselect.net shopware.store...
Others - Registered: Fri May 03 11:42:14 GMT 2024 - Last Modified: Wed Dec 20 23:27:07 GMT 2023 - 40.4K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm.s
SLL R5, R6, R7 // 1675a0e1 SLL.S R5, R6, R7 // 1675b0e1 SLL R5, R7 // 1775a0e1 SLL.S R5, R7 // 1775b0e1 // Ops with zero shifts should encode as left shifts ADD R0<<0, R1, R2 // 002081e0 ADD R0>>0, R1, R2 // 002081e0 ADD R0->0, R1, R2 // 002081e0 ADD R0@>0, R1, R2 // 002081e0 MOVW R0<<0(R1), R2 // 002091e7
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Fri Dec 15 20:51:01 GMT 2023 - 69K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/mips64.s
// LMOVW mreg ',' rreg // { // outcode(int($1), &$2, 0, &$4); // } MOVW M1, R1 // 40010800 MOVV M1, R1 // 40210800 // // integer operations // logical instructions // shift instructions // unary instructions // // LADDW rreg ',' sreg ',' rreg // { // outcode(int($1), &$2, int($4), &$6); // } ADD R5, R9, R10 // 01255020 ADDU R13, R14, R19 // 01cd9821
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Tue Aug 08 12:17:12 GMT 2023 - 12.4K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/s390x.s
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Wed Nov 22 03:55:32 GMT 2023 - 21.6K bytes - Viewed (0)