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Results 1 - 10 of 21 for REG_R15 (0.38 sec)

  2. github.com/golang/go

    src/runtime/defs_solaris_amd64.go 

    	REG_RCX    = C.REG_RCX
	REG_R8     = C.REG_R8
	REG_R9     = C.REG_R9
	REG_R10    = C.REG_R10
	REG_R11    = C.REG_R11
	REG_R12    = C.REG_R12
	REG_R13    = C.REG_R13
	REG_R14    = C.REG_R14
	REG_R15    = C.REG_R15
	REG_RBP    = C.REG_RBP
	REG_RBX    = C.REG_RBX
	REG_RAX    = C.REG_RAX
	REG_GS     = C.REG_GS
	REG_FS     = C.REG_FS
	REG_ES     = C.REG_ES
	REG_DS     = C.REG_DS
	REG_TRAPNO = C.REG_TRAPNO
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 28 18:17:57 UTC 2021
    - 1004 bytes
    - Viewed (0)
  3. github.com/golang/go

    src/runtime/defs_netbsd_arm.go 

    	REG_R6   = C._REG_R6
	REG_R7   = C._REG_R7
	REG_R8   = C._REG_R8
	REG_R9   = C._REG_R9
	REG_R10  = C._REG_R10
	REG_R11  = C._REG_R11
	REG_R12  = C._REG_R12
	REG_R13  = C._REG_R13
	REG_R14  = C._REG_R14
	REG_R15  = C._REG_R15
	REG_CPSR = C._REG_CPSR
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 28 18:17:57 UTC 2021
    - 764 bytes
    - Viewed (0)
  4. github.com/golang/go

    src/cmd/internal/obj/arm/a.out.go 

    const (
	REG_R0 = obj.RBaseARM + iota // must be 16-aligned
	REG_R1
	REG_R2
	REG_R3
	REG_R4
	REG_R5
	REG_R6
	REG_R7
	REG_R8
	REG_R9
	REG_R10
	REG_R11
	REG_R12
	REG_R13
	REG_R14
	REG_R15

	REG_F0 // must be 16-aligned
	REG_F1
	REG_F2
	REG_F3
	REG_F4
	REG_F5
	REG_F6
	REG_F7
	REG_F8
	REG_F9
	REG_F10
	REG_F11
	REG_F12
	REG_F13
	REG_F14
	REG_F15
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Apr 05 16:22:12 UTC 2021
    - 7K bytes
    - Viewed (0)
  5. github.com/golang/go

    src/cmd/internal/obj/x86/a.out.go 

    	REG_R13B
	REG_R14B
	REG_R15B

	REG_AX
	REG_CX
	REG_DX
	REG_BX
	REG_SP
	REG_BP
	REG_SI
	REG_DI
	REG_R8
	REG_R9
	REG_R10
	REG_R11
	REG_R12
	REG_R13
	REG_R14
	REG_R15

	REG_AH
	REG_CH
	REG_DH
	REG_BH

	REG_F0
	REG_F1
	REG_F2
	REG_F3
	REG_F4
	REG_F5
	REG_F6
	REG_F7

	REG_M0
	REG_M1
	REG_M2
	REG_M3
	REG_M4
	REG_M5
	REG_M6
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Mar 31 20:28:39 UTC 2021
    - 6.8K bytes
    - Viewed (0)
  6. github.com/golang/go

    src/runtime/defs_netbsd_amd64.go 

    	REG_RCX    = C._REG_RCX
	REG_R8     = C._REG_R8
	REG_R9     = C._REG_R9
	REG_R10    = C._REG_R10
	REG_R11    = C._REG_R11
	REG_R12    = C._REG_R12
	REG_R13    = C._REG_R13
	REG_R14    = C._REG_R14
	REG_R15    = C._REG_R15
	REG_RBP    = C._REG_RBP
	REG_RBX    = C._REG_RBX
	REG_RAX    = C._REG_RAX
	REG_GS     = C._REG_GS
	REG_FS     = C._REG_FS
	REG_ES     = C._REG_ES
	REG_DS     = C._REG_DS
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 28 18:17:57 UTC 2021
    - 1K bytes
    - Viewed (0)
  7. github.com/golang/go

    src/cmd/internal/obj/s390x/a.out.go 

    	REG_R0 = obj.RBaseS390X + iota
	REG_R1
	REG_R2
	REG_R3
	REG_R4
	REG_R5
	REG_R6
	REG_R7
	REG_R8
	REG_R9
	REG_R10
	REG_R11
	REG_R12
	REG_R13
	REG_R14
	REG_R15

	// Floating point registers (FPRs).
	REG_F0
	REG_F1
	REG_F2
	REG_F3
	REG_F4
	REG_F5
	REG_F6
	REG_F7
	REG_F8
	REG_F9
	REG_F10
	REG_F11
	REG_F12
	REG_F13
	REG_F14
	REG_F15
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Sep 05 16:41:03 UTC 2023
    - 12.4K bytes
    - Viewed (0)
  8. github.com/golang/go

    src/cmd/internal/obj/s390x/listz.go 

    	obj.RegisterOpcode(obj.ABaseS390X, Anames)
}

func rconv(r int) string {
	if r == 0 {
		return "NONE"
	}
	if r == REGG {
		// Special case.
		return "g"
	}
	if REG_R0 <= r && r <= REG_R15 {
		return fmt.Sprintf("R%d", r-REG_R0)
	}
	if REG_F0 <= r && r <= REG_F15 {
		return fmt.Sprintf("F%d", r-REG_F0)
	}
	if REG_AR0 <= r && r <= REG_AR15 {
		return fmt.Sprintf("AR%d", r-REG_AR0)
	}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat Apr 01 10:41:37 UTC 2017
    - 2.4K bytes
    - Viewed (0)
  9. github.com/golang/go

    src/cmd/internal/obj/arm/list5.go 

    	obj.RegisterOpSuffix("arm", obj.CConvARM)
}

func rconv(r int) string {
	if r == 0 {
		return "NONE"
	}
	if r == REGG {
		// Special case.
		return "g"
	}
	if REG_R0 <= r && r <= REG_R15 {
		return fmt.Sprintf("R%d", r-REG_R0)
	}
	if REG_F0 <= r && r <= REG_F15 {
		return fmt.Sprintf("F%d", r-REG_F0)
	}

	switch r {
	case REG_FPSR:
		return "FPSR"

	case REG_FPCR:
		return "FPCR"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Jun 04 07:25:06 UTC 2020
    - 3.1K bytes
    - Viewed (0)
  10. github.com/golang/go

    src/cmd/internal/obj/x86/asm_test.go 

    		{regAddr(REG_BPB), Yrb},
		{regAddr(REG_SIB), Yrb},
		{regAddr(REG_DIB), Yrb},
		{regAddr(REG_R8B), Yrb},
		{regAddr(REG_R12B), Yrb},
		{regAddr(REG_R8), Yrl},
		{regAddr(REG_R13), Yrl},
		{regAddr(REG_R15), Yrl},
		{regAddr(REG_SP), Yrl},
		{regAddr(REG_SI), Yrl},
		{regAddr(REG_DI), Yrl},
		{regAddr(REG_Z13), Yzr},
		{regAddr(REG_Z20), Yzr},
		{regAddr(REG_Z31), Yzr},
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Jul 28 19:39:51 UTC 2023
    - 9.2K bytes
    - Viewed (0)
  11. github.com/golang/go

    src/cmd/internal/obj/wasm/a.out.go 

    	REG_PAUSE

	// i32 locals
	REG_R0
	REG_R1
	REG_R2
	REG_R3
	REG_R4
	REG_R5
	REG_R6
	REG_R7
	REG_R8
	REG_R9
	REG_R10
	REG_R11
	REG_R12
	REG_R13
	REG_R14
	REG_R15

	// f32 locals
	REG_F0
	REG_F1
	REG_F2
	REG_F3
	REG_F4
	REG_F5
	REG_F6
	REG_F7
	REG_F8
	REG_F9
	REG_F10
	REG_F11
	REG_F12
	REG_F13
	REG_F14
	REG_F15
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Mar 02 05:28:55 UTC 2023
    - 4.3K bytes
    - Viewed (0)
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