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Results 1 - 7 of 7 for LARL (0.04 sec)
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src/cmd/link/internal/s390x/asm.go
// // <go.link.addmoduledata>: // larl %r2, <local.moduledata> // jg <runtime.addmoduledata@plt> // undef // // The job of appending the moduledata is delegated to runtime.addmoduledata. func gentext(ctxt *ld.Link, ldr *loader.Loader) { initfunc, addmoduledata := ld.PrepareAddmoduledata(ctxt) if initfunc == nil { return } // larl %r2, <local.moduledata> initfunc.AddUint8(0xc0)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Aug 23 05:58:20 UTC 2023 - 13.7K bytes - Viewed (0) -
src/cmd/internal/obj/s390x/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Sep 05 16:41:03 UTC 2023 - 7.1K bytes - Viewed (0) -
src/cmd/internal/obj/x86/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 11 18:32:50 UTC 2023 - 19.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/S390XOps.go
// 2. Loads and stores using relative addressing require the data be aligned // according to its size (8-bytes for double words, 4-bytes for words // and so on). // // We can always work around these by inserting LARL instructions (load address // relative long) in the assembler, but typically this results in worse code // generation because the address can't be re-used. Inserting instructions in the
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 24 00:21:13 UTC 2023 - 52.5K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64enc.s
LARW R11, R11 // 66450f02db LARL (BX), DX // 0f0213 LARL (R11), DX // 410f0213 LARL DX, DX // 0f02d2 LARL R11, DX // 410f02d3 LARL (BX), R11 // 440f021b LARL (R11), R11 // 450f021b LARL DX, R11 // 440f02da
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Oct 08 21:38:44 UTC 2021 - 581.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/S390X.rules
=> ((SUB|SUBW) (SL(D|W)const <t> x [uint8(log32(-c&^(-c-1)))]) (SL(D|W)const <t> x [uint8(log32(-c+(-c&^(-c-1))))])) // Fold ADD into MOVDaddr. Odd offsets from SB shouldn't be folded (LARL can't handle them). (ADDconst [c] (MOVDaddr [d] {s} x:(SB))) && ((c+d)&1 == 0) && is32Bit(int64(c)+int64(d)) => (MOVDaddr [c+d] {s} x)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 12 18:09:26 UTC 2023 - 74.3K bytes - Viewed (0) -
src/cmd/internal/obj/s390x/asmz.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 16 17:46:09 UTC 2024 - 176.7K bytes - Viewed (0)