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  1. android/guava-tests/test/com/google/common/util/concurrent/RateLimiterTest.java

          limiter.acquire(); // #7
        }
        assertEvents(
            "R0.00, R1.38, R1.13, R0.88, R0.63, R0.50, R0.50, R0.50", // #1
            "U0.50", // #2
            "U4.00", // #3
            "R0.00, R1.38, R1.13, R0.88, R0.63, R0.50, R0.50, R0.50", // #4
            "U0.50", // #5
            "U2.00", // #6
            "R0.00, R0.50, R0.50, R0.50, R0.50, R0.50, R0.50, R0.50"); // #7
      }
    
      public void testWarmUpWithColdFactor() {
    Created: Fri Dec 26 12:43:10 GMT 2025
    - Last Modified: Tue Oct 28 18:19:59 GMT 2025
    - 21.9K bytes
    - Click Count (0)
  2. guava-tests/test/com/google/common/util/concurrent/RateLimiterTest.java

          limiter.acquire(); // #7
        }
        assertEvents(
            "R0.00, R1.38, R1.13, R0.88, R0.63, R0.50, R0.50, R0.50", // #1
            "U0.50", // #2
            "U4.00", // #3
            "R0.00, R1.38, R1.13, R0.88, R0.63, R0.50, R0.50, R0.50", // #4
            "U0.50", // #5
            "U2.00", // #6
            "R0.00, R0.50, R0.50, R0.50, R0.50, R0.50, R0.50, R0.50"); // #7
      }
    
      public void testWarmUpWithColdFactor() {
    Created: Fri Dec 26 12:43:10 GMT 2025
    - Last Modified: Tue Oct 28 18:19:59 GMT 2025
    - 21.9K bytes
    - Click Count (0)
  3. src/cmd/asm/internal/asm/testdata/arm64.s

    	ADRP 12(PC), R2    // 02000090
    
    // LDP/STP
    	LDP	(R0), (R0, R1)      // 000440a9
    	LDP	(R0), (R1, R2)      // 010840a9
    	LDP	8(R0), (R1, R2)     // 018840a9
    	LDP	-8(R0), (R1, R2)    // 01887fa9
    	LDP	11(R0), (R1, R2)    // 1b2c0091610b40a9
    	LDP	1024(R0), (R1, R2)  // 1b001091610b40a9
    	LDP.W	8(R0), (R1, R2)     // 0188c0a9
    	LDP.P	8(R0), (R1, R2)     // 0188c0a8
    	LDP	(RSP), (R1, R2)     // e10b40a9
    Created: Tue Dec 30 11:13:12 GMT 2025
    - Last Modified: Mon Nov 10 17:34:13 GMT 2025
    - 96.1K bytes
    - Click Count (0)
  4. doc/asm.html

    </li>
    
    <li>
    <code>(R2)(R0)</code>:
    The location at <code>R0</code> plus <code>R2</code>.
    </li>
    
    <li>
    <code>R0.UXTB</code>
    <br>
    <code>R0.UXTB&lt;&lt;imm</code>:
    <code>UXTB</code>: extract an 8-bit value from the low-order bits of <code>R0</code> and zero-extend it to the size of <code>R0</code>.
    <code>R0.UXTB&lt;&lt;imm</code>: left shift the result of <code>R0.UXTB</code> by <code>imm</code> bits.
    Created: Tue Dec 30 11:13:12 GMT 2025
    - Last Modified: Fri Nov 14 19:09:46 GMT 2025
    - 36.5K bytes
    - Click Count (0)
  5. src/cmd/asm/internal/asm/testdata/arm64error.s

    	VREV16	V1.H4, V2.H4                                     // ERROR "invalid arrangement"
    	FLDPQ	(R0), (R1, R2)                                   // ERROR "invalid register pair"
    	FLDPQ	(R1), (F2, F2)                                   // ERROR "constrained unpredictable behavior"
    	FSTPQ	(R1, R2), (R0)                                   // ERROR "invalid register pair"
    	FLDPD	(R0), (R1, R2)                                   // ERROR "invalid register pair"
    Created: Tue Dec 30 11:13:12 GMT 2025
    - Last Modified: Tue Oct 14 19:00:00 GMT 2025
    - 38.4K bytes
    - Click Count (0)
  6. lib/fips140/v1.1.0-rc1.zip

    is in [0, 15]. func decompose32(r fieldElement) (r1 byte, r0 int32) { x := fieldFromMontgomery(r) r1 = highBits32(x) // r - r1 * (2 * γ2) mod± q r0 = int32(x) - int32(r1)*2*(q-1)/32 r0 = constantTimeSelectLe(q/2+1, r0, r0-q, r0) return r1, r0 } // useHint32 implements UseHint from FIPS 204 for γ2 = (q - 1) / 32. func useHint32(r fieldElement, hint byte) byte { const m = 16 // (q − 1) / (2 * γ2) r1, r0 := decompose32(r) if hint == 1 { if r0 > 0 { r1 = (r1 + 1) % m } else { // Underflow is safe, because...
    Created: Tue Dec 30 11:13:12 GMT 2025
    - Last Modified: Thu Dec 11 16:27:41 GMT 2025
    - 663K bytes
    - Click Count (0)
  7. src/cmd/asm/internal/asm/testdata/loong64enc1.s

    	ROTRV	$4, R4			// 84104d00
    	SYSCALL				// 00002b00
    	BEQ	R4, R5, 1(PC)		// 85040058
    	BEQ	R4, 1(PC)		// 80040040
    	BEQ	R4, R0, 1(PC)		// 80040040
    	BEQ	R0, R4, 1(PC)		// 80040040
    	BNE	R4, R5, 1(PC)		// 8504005c
    	BNE	R4, 1(PC)		// 80040044
    	BNE	R4, R0, 1(PC)		// 80040044
    	BNE	R0, R4, 1(PC)		// 80040044
    	BLTU	R4, 1(PC)		// 80040068
    	MOVF	y+8(FP), F4		// 6440002b
    	MOVD	y+8(FP), F4		// 6440802b
    Created: Tue Dec 30 11:13:12 GMT 2025
    - Last Modified: Thu Nov 27 00:46:52 GMT 2025
    - 44.5K bytes
    - Click Count (0)
  8. lib/fips140/v1.0.0-c2097c7c.zip

    addMul64(r0, a1_19, b4) r0 = addMul64(r0, a2_19, b3) r0 = addMul64(r0, a3_19, b2) r0 = addMul64(r0, a4_19, b1) // r1 = a0×b1 + a1×b0 + 19×(a2×b4 + a3×b3 + a4×b2) r1 := mul64(a0, b1) r1 = addMul64(r1, a1, b0) r1 = addMul64(r1, a2_19, b4) r1 = addMul64(r1, a3_19, b3) r1 = addMul64(r1, a4_19, b2) // r2 = a0×b2 + a1×b1 + a2×b0 + 19×(a3×b4 + a4×b3) r2 := mul64(a0, b2) r2 = addMul64(r2, a1, b1) r2 = addMul64(r2, a2, b0) r2 = addMul64(r2, a3_19, b4) r2 = addMul64(r2, a4_19, b3) // r3 = a0×b3 + a1×b2 + a2×b1...
    Created: Tue Dec 30 11:13:12 GMT 2025
    - Last Modified: Thu Sep 25 19:53:19 GMT 2025
    - 642.7K bytes
    - Click Count (0)
  9. src/cmd/asm/internal/asm/asm.go

    			p.toPatch = append(p.toPatch, Patch{targetAddr, target.Sym.Name})
    		} else {
    			p.branch(targetAddr, targetProg)
    		}
    	case target.Type == obj.TYPE_MEM && target.Name == obj.NAME_NONE:
    		// JMP 4(R0)
    		*targetAddr = *target
    		// On the ppc64, 9a encodes BR (CTR) as BR CTR. We do the same.
    		if p.arch.Family == sys.PPC64 && target.Offset == 0 {
    			targetAddr.Type = obj.TYPE_REG
    		}
    Created: Tue Dec 30 11:13:12 GMT 2025
    - Last Modified: Tue Oct 21 15:13:08 GMT 2025
    - 26.7K bytes
    - Click Count (0)
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