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Results 1 - 10 of 11 for dmulq (0.19 sec)

  1. test/codegen/arithmetic.go

    //    Multiplication    //
    // -------------------- //
    
    func Pow2Muls(n1, n2 int) (int, int) {
    	// amd64:"SHLQ\t[$]5",-"IMULQ"
    	// 386:"SHLL\t[$]5",-"IMULL"
    	// arm:"SLL\t[$]5",-"MUL"
    	// arm64:"LSL\t[$]5",-"MUL"
    	// ppc64x:"SLD\t[$]5",-"MUL"
    	a := n1 * 32
    
    	// amd64:"SHLQ\t[$]6",-"IMULQ"
    	// 386:"SHLL\t[$]6",-"IMULL"
    	// arm:"SLL\t[$]6",-"MUL"
    	// arm64:`NEG\sR[0-9]+<<6,\sR[0-9]+`,-`LSL`,-`MUL`
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri May 17 15:28:00 UTC 2024
    - 15.2K bytes
    - Viewed (0)
  2. src/crypto/internal/edwards25519/field/fe_amd64.s

    	IMUL3Q $0x13, AX, AX
    	MULQ   24(BX)
    	ADDQ   AX, R9
    	ADCQ   DX, R8
    
    	// r1 += 19×a4×b2
    	MOVQ   32(CX), AX
    	IMUL3Q $0x13, AX, AX
    	MULQ   16(BX)
    	ADDQ   AX, R9
    	ADCQ   DX, R8
    
    	// r2 = a0×b2
    	MOVQ (CX), AX
    	MULQ 16(BX)
    	MOVQ AX, R11
    	MOVQ DX, R10
    
    	// r2 += a1×b1
    	MOVQ 8(CX), AX
    	MULQ 8(BX)
    	ADDQ AX, R11
    	ADCQ DX, R10
    
    	// r2 += a2×b0
    	MOVQ 16(CX), AX
    	MULQ (BX)
    	ADDQ AX, R11
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 5.7K bytes
    - Viewed (0)
  3. src/crypto/internal/nistec/p256_asm_amd64.s

    	MOVQ (8*0)(x_ptr), t0
    
    	MOVQ (8*1)(x_ptr), AX
    	MULQ t0
    	MOVQ AX, acc1
    	MOVQ DX, acc2
    
    	MOVQ (8*2)(x_ptr), AX
    	MULQ t0
    	ADDQ AX, acc2
    	ADCQ $0, DX
    	MOVQ DX, acc3
    
    	MOVQ (8*3)(x_ptr), AX
    	MULQ t0
    	ADDQ AX, acc3
    	ADCQ $0, DX
    	MOVQ DX, acc4
    	// y[2:] * y[1]
    	MOVQ (8*1)(x_ptr), t0
    
    	MOVQ (8*2)(x_ptr), AX
    	MULQ t0
    	ADDQ AX, acc3
    	ADCQ $0, DX
    	MOVQ DX, t1
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 39.8K bytes
    - Viewed (0)
  4. src/cmd/internal/obj/riscv/anames.go

    	"FCVTDLU",
    	"FCVTSD",
    	"FCVTDS",
    	"FSGNJD",
    	"FSGNJND",
    	"FSGNJXD",
    	"FMVXD",
    	"FMVDX",
    	"FEQD",
    	"FLTD",
    	"FLED",
    	"FCLASSD",
    	"FLQ",
    	"FSQ",
    	"FADDQ",
    	"FSUBQ",
    	"FMULQ",
    	"FDIVQ",
    	"FMINQ",
    	"FMAXQ",
    	"FSQRTQ",
    	"FMADDQ",
    	"FMSUBQ",
    	"FNMADDQ",
    	"FNMSUBQ",
    	"FCVTWQ",
    	"FCVTLQ",
    	"FCVTSQ",
    	"FCVTDQ",
    	"FCVTQW",
    	"FCVTQL",
    	"FCVTQS",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Mar 20 14:19:33 UTC 2024
    - 2.9K bytes
    - Viewed (0)
  5. src/crypto/internal/edwards25519/field/_asm/fe_amd64_asm.go

    		Load(aX, RAX)
    	case 2:
    		Comment(fmt.Sprintf("%s = 2×%s×%s", r, aX, bX))
    		Load(aX, RAX)
    		SHLQ(Imm(1), RAX)
    	default:
    		panic("unsupported i value")
    	}
    	MULQ(mustAddr(bX)) // RDX, RAX = RAX * bX
    	MOVQ(RAX, r.lo)
    	MOVQ(RDX, r.hi)
    }
    
    // addMul64 sets r to r + i * aX * bX.
    func addMul64(r uint128, i uint64, aX, bX namedComponent) {
    	switch i {
    	case 1:
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 7.2K bytes
    - Viewed (0)
  6. src/runtime/sys_windows_amd64.s

    // set tls base to DI
    TEXT runtime·settls(SB),NOSPLIT,$0
    	MOVQ	runtime·tls_g(SB), CX
    	MOVQ	DI, 0(CX)(GS)
    	RET
    
    TEXT runtime·nanotime1(SB),NOSPLIT,$0-8
    	MOVQ	$_INTERRUPT_TIME, DI
    	MOVQ	time_lo(DI), AX
    	IMULQ	$100, AX
    	MOVQ	AX, ret+0(FP)
    	RET
    
    // func osSetupTLS(mp *m)
    // Setup TLS. for use by needm on Windows.
    TEXT runtime·osSetupTLS(SB),NOSPLIT,$0-8
    	MOVQ	mp+0(FP), AX
    	LEAQ	m_tls(AX), DI
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Feb 19 07:24:08 UTC 2024
    - 8.4K bytes
    - Viewed (0)
  7. test/codegen/mathbits.go

    //    bits.Mul*    //
    // --------------- //
    
    func Mul(x, y uint) (hi, lo uint) {
    	// amd64:"MULQ"
    	// arm64:"UMULH","MUL"
    	// ppc64x:"MULHDU","MULLD"
    	// s390x:"MLGR"
    	// mips64: "MULVU"
    	// riscv64:"MULHU","MUL"
    	return bits.Mul(x, y)
    }
    
    func Mul64(x, y uint64) (hi, lo uint64) {
    	// amd64:"MULQ"
    	// arm64:"UMULH","MUL"
    	// ppc64x:"MULHDU","MULLD"
    	// s390x:"MLGR"
    	// mips64: "MULVU"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 18:51:17 UTC 2024
    - 19.6K bytes
    - Viewed (0)
  8. src/cmd/compile/internal/ssa/_gen/AMD64.rules

    // (ANDQconst [0xFFFFFFFF] x) => (MOVLQZX x)
    
    // strength reduction
    // Assumes that the following costs from https://gmplib.org/~tege/x86-timing.pdf:
    //    1 - addq, shlq, leaq, negq, subq
    //    3 - imulq
    // This limits the rewrites to two instructions.
    // Note that negq always operates in-place,
    // which can require a register-register move
    // to preserve the original value,
    // so it must be used with care.
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 93.9K bytes
    - Viewed (0)
  9. src/cmd/internal/obj/x86/asm6.go

    	{AMPSADBW, yxshuf, Pq, opBytes{0x3a, 0x42, 0}},
    	{AMULB, ydivb, Pb, opBytes{0xf6, 04}},
    	{AMULL, ydivl, Px, opBytes{0xf7, 04}},
    	{AMULPD, yxm, Pe, opBytes{0x59}},
    	{AMULPS, yxm, Ym, opBytes{0x59}},
    	{AMULQ, ydivl, Pw, opBytes{0xf7, 04}},
    	{AMULSD, yxm, Pf2, opBytes{0x59}},
    	{AMULSS, yxm, Pf3, opBytes{0x59}},
    	{AMULW, ydivl, Pe, opBytes{0xf7, 04}},
    	{ANEGB, yscond, Pb, opBytes{0xf6, 03}},
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 15 15:44:14 UTC 2024
    - 146.9K bytes
    - Viewed (0)
  10. src/cmd/compile/internal/ssa/opGen.go

    		commutative:  true,
    		clobberFlags: true,
    		asm:          x86.AMULQ,
    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 1},     // AX
    				{1, 49151}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
    			},
    			clobbers: 4, // DX
    			outputs: []outputInfo{
    				{1, 0},
    				{0, 1}, // AX
    			},
    		},
    	},
    	{
    		name:         "HMULQ",
    		argLen:       2,
    		clobberFlags: true,
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
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