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Results 1 - 6 of 6 for MSUBW (0.08 sec)
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src/cmd/compile/internal/ssa/_gen/ARM64.rules
(MSUBW a x (MOVDconst [c])) && int32(c)==-1 => (MOVWUreg (ADD <a.Type> a x)) (MSUBW a _ (MOVDconst [c])) && int32(c)==0 => (MOVWUreg a) (MSUBW a x (MOVDconst [c])) && int32(c)==1 => (MOVWUreg (SUB <a.Type> a x)) (MSUBW a x (MOVDconst [c])) && isPowerOfTwo64(c) => (MOVWUreg (SUBshiftLL <a.Type> a x [log64(c)]))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 113.1K bytes - Viewed (0) -
test/codegen/arithmetic.go
func MULS(a, b, c uint32) (uint32, uint32, uint32) { // arm/7:`MULS`,-`MUL\s` // arm/6:`SUB`,`MUL\s`,-`MULS` // arm64:`MSUBW`,-`MULW` r0 := c - a*b // arm/7:`MULS`,-`MUL\s` // arm/6:`SUB`,`MUL\s`,-`MULS` // arm64:`MSUBW`,-`MULW` r1 := a - c*79 // arm/7:`SUB`,-`MULS`,-`MUL\s` // arm64:`SUB`,-`MSUBW`,-`MULW` // ppc64x:`SUB`,-`MULLD` r2 := c - b*64 return r0, r1, r2 }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 15:28:00 UTC 2024 - 15.2K bytes - Viewed (0) -
test/codegen/comparisons.go
if a-b*c > 0 { return 1 } // arm64:`CMP`,-`MSUB`,`MUL`,`(BMI|BPL)` if b-c*d >= 0 { return 2 } // arm64:`CMPW`,-`MSUBW`,`MULW`,`(BMI|BPL)` if e-f*g < 0 { return 5 } // arm64:`CMPW`,-`MSUBW`,`MULW`,`(BMI|BPL)` if f-g*h >= 0 { return 6 } return 0 } func CmpToZero_ex5(e, f int32, u uint32) int { // arm:`CMN`,-`ADD`,`BEQ`,`(BMI|BPL)`
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 19 16:31:02 UTC 2024 - 15.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/rewriteARM64.go
return true } // match: (MSUBW a _ (MOVDconst [c])) // cond: int32(c)==0 // result: (MOVWUreg a) for { a := v_0 if v_2.Op != OpARM64MOVDconst { break } c := auxIntToInt64(v_2.AuxInt) if !(int32(c) == 0) { break } v.reset(OpARM64MOVWUreg) v.AddArg(a) return true } // match: (MSUBW a x (MOVDconst [c])) // cond: int32(c)==1
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 608.6K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64Ops.go
{name: "MADDW", argLength: 3, reg: gp31, asm: "MADDW"}, // +arg0 + (arg1 * arg2), 32-bit {name: "MSUB", argLength: 3, reg: gp31, asm: "MSUB"}, // +arg0 - (arg1 * arg2) {name: "MSUBW", argLength: 3, reg: gp31, asm: "MSUBW"}, // +arg0 - (arg1 * arg2), 32-bit // shifts {name: "SLL", argLength: 2, reg: gp21, asm: "LSL"}, // arg0 << arg1, shift amount is mod 64
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 58.8K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
}, outputs: []outputInfo{ {0, 670826495}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R23 R24 R25 R26 R30 }, }, }, { name: "MSUBW", argLen: 3, asm: arm64.AMSUBW, reg: regInfo{ inputs: []inputInfo{ {0, 805044223}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R23 R24 R25 R26 g R30
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0)