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Results 1 - 10 of 70 for r22 (0.14 sec)
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src/crypto/md5/md5block_ppc64x.s
ROUND2(R22,R3,R4,R5,M01,0xf61e2562, 5); ROUND2(R5,R22,R3,R4,M06,0xc040b340, 9); ROUND2(R4,R5,R22,R3,M11,0x265e5a51,14); ROUND2(R3,R4,R5,R22,M00,0xe9b6c7aa,20); ROUND2(R22,R3,R4,R5,M05,0xd62f105d, 5); ROUND2(R5,R22,R3,R4,M10, 0x2441453, 9); ROUND2(R4,R5,R22,R3,M15,0xd8a1e681,14); ROUND2(R3,R4,R5,R22,M04,0xe7d3fbc8,20); ROUND2(R22,R3,R4,R5,M09,0x21e1cde6, 5); ROUND2(R5,R22,R3,R4,M14,0xc33707d6, 9);
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 20 18:05:32 UTC 2024 - 5.3K bytes - Viewed (0) -
src/vendor/golang.org/x/crypto/internal/poly1305/sum_ppc64le.s
SUB R21, R5, R21 // Greater than 8 -- load the rightmost remaining bytes in msg // and put into R17 (h1) MOVD (R4)(R21), R17 MOVD $16, R22 // Find the offset to those bytes SUB R5, R22, R22 SLD $3, R22 // Shift to get only the bytes in msg SRD R22, R17, R17 // Put 1 at high end MOVD $1, R23 SLD $3, R21 SLD R21, R23, R23 OR R23, R17, R17 // Remainder is 8
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sat Mar 09 00:09:40 UTC 2024 - 3.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
{1, 670826495}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R23 R24 R25 R26 R30 }, outputs: []outputInfo{ {1, 0}, {0, 670826495}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R23 R24 R25 R26 R30 }, }, }, {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/mips64.s
// LSHW imm ',' sreg ',' rreg // { // outcode(int($1), &$2, int($4), &$6); // } SLL $19, R22, R21 // 0016acc0 SLLV $19, R22, R21 // 0016acf8 SRL $31, R6, R17 // 00068fc2 SRLV $31, R6, R17 // 00068ffa SRA $8, R8, R19 // 00089a03 SRAV $19, R8, R7 // 00083cfb ROTR $12, R8, R3 // 00281b02 ROTRV $8, R22, R22 // 0036b23a // LSHW imm ',' rreg // { // outcode(int($1), &$2, 0, &$4); // }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 08 12:17:12 UTC 2023 - 12.4K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64enc.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jul 24 01:11:41 UTC 2023 - 43.9K bytes - Viewed (0) -
src/runtime/sys_linux_ppc64x.s
// We won't get a nested signal. MOVBZ runtime·iscgo(SB), R22 CMP R22, $0 BNE nosaveg MOVD m_gsignal(R21), R22 // g.m.gsignal CMP R22, $0 BEQ nosaveg CMP g, R22 BEQ nosaveg MOVD (g_stack+stack_lo)(R22), R22 // g.m.gsignal.stack.lo MOVD g, (R22) BL (CTR) // Call from VDSO MOVD $0, (R22) // clear g slot, R22 is unchanged by C code JMP finish nosaveg:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 18:17:17 UTC 2024 - 18.1K bytes - Viewed (0) -
src/runtime/sys_linux_arm64.s
// We won't get a nested signal. MOVBU runtime·iscgo(SB), R22 CBNZ R22, nosaveg MOVD m_gsignal(R21), R22 // g.m.gsignal CBZ R22, nosaveg CMP g, R22 BEQ nosaveg MOVD (g_stack+stack_lo)(R22), R22 // g.m.gsignal.stack.lo MOVD g, (R22) BL (R2) MOVD ZR, (R22) // clear g slot, R22 is unchanged by C code B finish nosaveg: BL (R2) B finish
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Mar 24 18:53:44 UTC 2023 - 16.7K bytes - Viewed (0) -
src/math/big/arith_ppc64x.s
MOVD 16(R8), R21 // R21 = x[i+1] MOVD 24(R8), R22 // R22 = x[i+2] MOVDU 32(R8), R23 // R23 = x[i+3] MULLD R9, R20, R24 // R24 = z0[i] MULHDU R9, R20, R20 // R20 = z1[i] ADDC R4, R24 // R24 = z0[i] + c MULLD R9, R21, R25 MULHDU R9, R21, R21 ADDE R20, R25 MULLD R9, R22, R26 MULHDU R9, R22, R22 MULLD R9, R23, R27 MULHDU R9, R23, R23
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 18:17:17 UTC 2024 - 16.8K bytes - Viewed (0) -
src/crypto/internal/edwards25519/field/fe_arm64.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 1K bytes - Viewed (0) -
src/runtime/preempt_arm64.s
STP (R4, R5), 40(RSP) STP (R6, R7), 56(RSP) STP (R8, R9), 72(RSP) STP (R10, R11), 88(RSP) STP (R12, R13), 104(RSP) STP (R14, R15), 120(RSP) STP (R16, R17), 136(RSP) STP (R19, R20), 152(RSP) STP (R21, R22), 168(RSP) STP (R23, R24), 184(RSP) STP (R25, R26), 200(RSP) MOVD NZCV, R0 MOVD R0, 216(RSP) MOVD FPSR, R0 MOVD R0, 224(RSP) FSTPD (F0, F1), 232(RSP) FSTPD (F2, F3), 248(RSP) FSTPD (F4, F5), 264(RSP)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 03 01:58:56 UTC 2022 - 2K bytes - Viewed (0)