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Results 1 - 4 of 4 for ddivq (0.19 sec)

  1. test/codegen/arithmetic.go

    	// 386:"IMUL3L\t[$]-1431655765","ROLL\t[$]31",-"DIVQ"
    	// arm64:"MOVD\t[$]-6148914691236517205","MOVD\t[$]3074457345618258602","MUL","ROR",-"DIV"
    	// arm:"MUL","CMP\t[$]715827882",-".*udiv"
    	// ppc64x:"MULLD","ROTL\t[$]63"
    	even := n%6 == 0
    
    	// amd64:"MOVQ\t[$]-8737931403336103397","IMULQ",-"ROLQ",-"DIVQ"
    	// 386:"IMUL3L\t[$]678152731",-"ROLL",-"DIVQ"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri May 17 15:28:00 UTC 2024
    - 15.2K bytes
    - Viewed (0)
  2. test/codegen/mathbits.go

    func Div(hi, lo, x uint) (q, r uint) {
    	// amd64:"DIVQ"
    	return bits.Div(hi, lo, x)
    }
    
    func Div32(hi, lo, x uint32) (q, r uint32) {
    	// arm64:"ORR","UDIV","MSUB",-"UREM"
    	return bits.Div32(hi, lo, x)
    }
    
    func Div64(hi, lo, x uint64) (q, r uint64) {
    	// amd64:"DIVQ"
    	return bits.Div64(hi, lo, x)
    }
    
    func Div64degenerate(x uint64) (q, r uint64) {
    	// amd64:-"DIVQ"
    	return bits.Div64(0, x, 5)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 18:51:17 UTC 2024
    - 19.6K bytes
    - Viewed (0)
  3. src/cmd/internal/obj/x86/asm6.go

    	{ADECW, yincq, Pe, opBytes{0xff, 01}},
    	{ADIVB, ydivb, Pb, opBytes{0xf6, 06}},
    	{ADIVL, ydivl, Px, opBytes{0xf7, 06}},
    	{ADIVPD, yxm, Pe, opBytes{0x5e}},
    	{ADIVPS, yxm, Pm, opBytes{0x5e}},
    	{ADIVQ, ydivl, Pw, opBytes{0xf7, 06}},
    	{ADIVSD, yxm, Pf2, opBytes{0x5e}},
    	{ADIVSS, yxm, Pf3, opBytes{0x5e}},
    	{ADIVW, ydivl, Pe, opBytes{0xf7, 06}},
    	{ADPPD, yxshuf, Pq, opBytes{0x3a, 0x41, 0}},
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 15 15:44:14 UTC 2024
    - 146.9K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/opGen.go

    			},
    			outputs: []outputInfo{
    				{0, 1}, // AX
    				{1, 4}, // DX
    			},
    		},
    	},
    	{
    		name:         "DIVQU",
    		argLen:       2,
    		clobberFlags: true,
    		asm:          x86.ADIVQ,
    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 1},     // AX
    				{1, 49147}, // AX CX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
    			},
    			outputs: []outputInfo{
    				{0, 1}, // AX
    				{1, 4}, // DX
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
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